The solution came in the form of two new devices - the Complex Programmable Logic Device (CPLD) and the Field Programmable Gate Array. As can be seen in Figure 4, CPLDs and FPGAs bridge the gap between PALs and Gate Arrays. CPLDs are as fast as PALs but more complex. FPGAs approach the complexity of Gate Arrays but are still programmable.
A more specific discussion of three FPGA/CPLD architectures can be found in: [Trim94] S. Trimberger, Ed., Field-Programmable Gate Array Technology, Kluwer Academic Publishers, 1994.
3.5.1.4 Programmable Elements Different manufacturers use different technologies to implement the programmable elements of a CPLD. The common technologies are Electrically Programmable Read Only Memory (EPROM), Electrically Erasable PROM (EEPROM) and Flash EPROM.
The two basic types of programmable elements for an FPGA are Static RAM and anti-fuses. 3.6.1.1 Configurable Logic Blocks Configurable Logic Blocks contain the logic for the FPGA. In a large grain architecture, these CLBs will contain enough logic to create a small state machine.