Quartus® Prime synthesis supports the following VHDL language standards: VHDL 1987 (IEEE Standard 1076-198.
7) VHDL 1993 (IEEE Standard 1076-199.
3) VHDL 2008 (IEEE Standard 1076-2008)
Every VHDL design description consists of at least one entity / architecture pair, or one entity with multiple architectures.
The entity section of the HDL design is used to declare the I/O ports of the circuit, while the description code resides within architecture portion.
Yes, VHDL (VHSIC Hardware Description Language) is still used today, especially in the field of electronic design and automation.