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6809 Assembly Language Programming (Lance Leventhal)

22. The Instruction Set. (For page number reference see the list of 6809 instructions at the back of the book.).



6809 DEVELOPMENT MANUAL PRELIMINARY

detail; the assembly language is described in M6809 Cross Macro Assembler. Reference Manual -- M6809XASM(Dl} •. PROGRAMMING FEATURES. The 6809 Assembler 



TRS-80° Color Computer Assembly Language Programming

The 6809 microprocessor is a relatively new microprocessor with a powerful instruction set and addressing modes. The 6809 has many features that aren't found in 



6809 Assembly Language Programming

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ASM09 6809 Optimizing Assembler

manual for the. SWTPC 6809 Optimizing Assembler Version. 3. It is not intended as a tutorial on assembly language _ programming



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purpose of this tutorial is to introduce the reader to the capabilities of the supports all of the 6809 instructions. All of the user registers are also.



Collapse OS Documentation

2021/09/29 6809 assembly language designer decided to decline every ops with all their possible targets. For example the "ADD" op. Page 67. 2.4 6809 ...



THE 6502/6809 JOURNAL

into a cross-assembler for 6809 programs. Interfaces to Stellation MILL • manual has extensive FORTH TUTORIAL. For more Information and an ordering form.



LW Tool Chain

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6809 Assembly Language Programming

This book's assembler listings were generated on a 6809-based EXORciser system "EON Software Tutorial: Hash Coding" EDN



6809 Assembly Language Programming

Olle. 6809. Assembly Language. Programming. WIGAN LIBRARIES. WITHDRAWAN. FOR. DOOK SALE Lance A. Leventhal. OSBORNE/McGraw-Hill. Berkeley California 



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Waterloo 6809 Assembler. Tutorial and Reference Manual. D. D. Cowan 6809 Assembler and so it is difficult to acknowledge anyone individually. The design.



6809 Assembly Language Programming (Lance Leventhal)

6809. Assembly Language. Programming. WIGAN LIBRARIES. WITHDRAWIN This book's assembler listings were generated on a 6809-based EXORciser system.



DigitalOcean

This book's assembler listings were generated on a 6809-based EXORciser system "EON Software Tutorial: Hash Coding" EDN



6809 Machine Code Programming (David Barrow)

34 6809 Machine Code Programming series 'PCW SUB SET' in Personal Computer World (essential reading for assembly language programmers) where the conclusion.



6809 DEVELOPMENT MANUAL PRELIMINARY

of the 6809 processor. This is a reference manual not a tutorial; it The 6809 Assembler is both a programming language and a language processor.



TRS-80° Color Computer Assembly Language Programming

The 6809 microprocessor is a relatively new microprocessor with a powerful instruction set and addressing modes. The 6809 has many features that aren't found in 



ASM09 6809 Optimizing Assembler

tutorial on assembly language _ programming nor fs it intended as a reference on the. 6809 microprocessor. Although detailed descriptions.



Contents

8.1 A Tutorial Introduction 13.1 The 6809-based embedded microprocessor implementation. ... 16.1 A 6809-based assembly-level coding.

Contents

Part I Target Processors1

1 The 6809 Microprocessor: Its Hardware2

1.1 Architecture3

1.2 Outside the 68096

1.3 Making the Connection9

2 The 6809 Microprocessor: Its Software19

2.1 Its Instruction Set19

2.2 Address Modes30

2.3 Example Programs41

3 The 68000/8 Microprocessor : Its Hardware56

3.1 Inside the 68000/857

3.2 Outside the 68000/864

3.3 Making the Connection71

4 The 68000/8 Microprocessor: Its Software86

4.1 Its Instruction Set86

4.2 Address Modes106

4.3 Example Programs114

5 Subroutines, Procedures and Functions122

5.1 The Call-Return Mechanism123

5.2 Passing Parameters129

6 Interrupts plus Traps equals Exceptions141

6.1 Hardware Initiated Interrupts143

6.2 Interrupts in Software161

Part II C167

7 Source to Executable Code168

7.1 The Assembly Process170

7.2 Linking and Loading178

7.3 The High-Level Process189

v vi Contents

8 Naked C199

8.1 A Tutorial Introduction200

8.2 Variables and Constants202

8.3 Operators, Expressions and Statements213

8.4 Program Flow Control224

9 More Naked C236

9.1 Functions236

9.2 Arrays and Pointers245

9.3 Structures258

9.4 Headers and Libraries271

10 ROMable C278

10.1 Mixing Assembly Code and Starting Up278

10.2 Exception Handling286

10.3 Initializing Variables291

10.4 Portability297

Part III Project in C309

11 Preliminaries310

11.1 Specification313

11.2 System Design315

12 The Analog World323

12.1 Signals323

12.2 Digital to Analog Conversion329

12.3 Analog to Digital Conversion337

13 The Target Microcomputer345

13.1 6809 - Target Hardware345

13.2 68008 - Target Hardware350

14 Software inC355

14.1 Data Structure and Program355

14.2 6809 - Target Code359

14.3 68008 - Target Code370

15 Looking For Trouble383

15.1 Simulation384

15.2 Resident Diagnostics397

15.3 In-Circuit Emulation408

16 C"est la Fin416

16.1 Results416

16.2 More Ideas420

Contents vii

A Acronyms and Abbreviations423

List of Figures

1.1 Internal 6809/6309 structure.4

1.2 6809 pinout.7

1.3 A snapshot of the 6809 MPU reading data from a peripheral device.10

1.4 Sending data to the outside world.11

1.5 The structure of a synchronous common-bus microcomputer.12

1.6 An elementary address decoding scheme.14

1.7 A simple byte-sized output port.15

1.8 Talking to a 6116 2kbyte static RAM chip.15

1.9 Interfacing a 6821 Peripheral Interface Adapter to the 6809.17

2.1 Postbyte for pushing and pulling.20

2.2 Moving 16-bit data at òne go".22

2.3 Stacking registers in memory.23

2.4 16-bit binary to decimal string conversion.48

2.5 Evaluating factorialn.51

2.6 A memory mapof the factorial process.52

3.1 Internal structure pf the 68000.58

3.2 Internal 68008 structure.63

3.3 68000 and 68008 DIL packages.65

3.4 Memory Organization for the 68000.67

3.5 The structure of an asynchronous common-bus micro-computer.72

3.6 The 68000/8 Read cycle.73

3.7 The 68000/8 Write cycle.75

3.8 A simple address decoder with no-wait feedback circuitry.77

3.9 A DTACK generator for slow devices.78

3.10 A simple word-sized output port.80

3.11 Interfacing 6264 RAM ICs to the 68000 MPU.81

3.12 Fast EPROM interface.82

3.13 Interfacing the 68230 PI/T to the 68000"s buses.83

3.14 Interfacing a 6821 Peripheral Interface Adapter to the 68000.84

4.1 Multiple moves to and from memory.90

4.2 Multiple precision addition.93

4.3 UsingDBccto implement a loop structure.101

4.4 Two examples of machine coding.114

5.1 Subroutine calling.124

5.2 Saving the return address on the Stack.126

5.3 The stack when executing the code of Table 5.3(b), viewed as word-oriented.128

viii

LIST OF FIGURES ix

5.4 The Stack corresponding to Table 5.6.132

5.5 The Stack used for theBLOCK_COPYsubroutine.134

5.6 The 6809 System stack organized by the array averaging subroutine.136

5.7 The 68000 System stack organized by the array-averaging subroutine.138

6.1 Detecting and measuring an asynchronous external event.142

6.2 Interrupt logic for the 6809 and 68000 processors.145

6.3 Using a priority encoder to compress 7 lines to 3-line code.146

6.4 How the 6809 responds to an interrupt request149

6.5 How the 68000 responds to an interrupt request151

6.6 Using an external interrupt flag to drive a level-sensitive interrupt line.153

6.7 Servicing four peripherals with one interrupt.157

6.8 External interrupt hardware for the 68000 MPU.158

7.1 Onion skin view of the steps leading to an executable program.170

7.2 Assembly-level machine code translation.172

7.3 Assembly environment.188

7.4 Syntax tree forsum = (n+1) * n/2;191

7.5 The WhitesmithsCcompiler process.194

8.1 Structure ofCprograms.203

8.2 Properties of simple object types.204

8.3 Basic set ofCdata types.205

8.4 Type promotions.222

8.5 Simple 2-way decisions.224

8.6 Usingelse-ifto make a multi-way decision.227

8.7switch-casemulti-way decision.229

8.8 Loopconstructs.231

9.1 Layout ofCprograms.237

9.2 The System stack as seen from withinpower(), lines 21-38.243

9.3 Array storage in memory.249

9.4 A simple write-only port at0x9000.255

9.5 Register structure of a 6821 PIA.262

11.1 A typical long-persistence display.311

11.2 Characteristic scrolling display of a time-compressed memory.312

11.3 Block diagram of the electrocardiograph time compressed memory.316

11.4 A broad outline of system development.318

11.5 Fundamental chip-level design.320

11.6 A cost versus production comparison.322

12.1 The quantization process.325

12.2 The analog-digital process.328

12.3 Illustrating aliasing.329

12.4 A 4th-order anti-aliasing filter.330

12.5 The R-2R current D/A converter.331

12.6 Conversion relationships for the network of Fig. 12.5.333

12.7 A real-world transfer characteristic.334

x LIST OF FIGURES

12.8 The AD7528 dual D/A converter.335

12.9 Interfacing the AD7528 to a microprocessor.336

12.10 A 3-bit flash A/D converter.338

12.11 A software controlled successive approximation D/A converter.339

12.12 Functional diagram of the AD7576 A/D converter.340

12.13 Interfacing the AD7576 to a microprocessor.342

12.14 Aperture error.343

13.1 The 6809-based embedded microprocessor implementation.347

13.2 A PAL-based 6809 address decoder implementation.349

13.3 The 68008-based embedded microprocessor implementation.352

13.4 A PAL-based 68008 address decoder implementation.353

14.1 Data stored as a circular array.356

15.1 Tracing functionsum_of_n().392

15.2 Illustrating the function path in reaching line 27.393

15.3 Simulating the time-compressed memory software.394

15.4 Simulating an interrupt entry intoupdate().395

15.5 Mixed-mode simulation using XRAY68K.396

15.6 Free-running your microprocessor.398

15.7 One free-run cycle, showingRAM,A/DandDIG_O/PEnables.399

15.8 Theoutput_test()traces.404

15.9 A typical PC-based ICE configuration.410

16.1 Typical X and Y waveforms, showing two ECG traces covering 2s.420

List of Tables

2.1 Move instructions.21

2.2 Arithmetic operations24

2.3 Shifting Instructions.26

2.4 Logic instructions.27

2.5 Data test operations.28

2.6 Operations which affect the Program Counter.29

2.7 The M6809 instruction set33

2.8 Initializing a 256-byte array.34

2.9 Source code for sum ofnintegers program.45

2.10 Object code generated from Table 2.9.46

2.11 A superior implementation.47

2.12 16-bit binary to an equivalent ASCII-coded decimal string.49

2.13 Fundamental factorial-ncode.53

2.14 Factorial using a look-uptable.54

4.1 Move instructions.88

4.2 Arithmetic operations.91

4.3 Shifting instructions.95

4.4 Logic Instructions.97

4.5 Bit-level instructions.98

4.6 Data testing instructions.99

4.7 Instructions which affect the Program Counter.100

4.8 Summary of 68000 instructions.105

4.9 A summary of 68000 address modes.113

4.10 Object code for sum ofnintegers program.115

4.11 A superior implementation.116

4.12 Binary to decimal string conversion.118

4.13 Mathematical evaluation of factorialn.119

4.14 Factorial using a look-uptable.120

5.1 Subroutine instructions.125

5.2 A simple subroutine giving a fixed delay of 100ms when called.127

5.3 Transparent 100ms delay subroutine.129

5.4 Using a register to pass the delay parameter.130

5.5 Using a static memory location to pass the delay parameter.131

5.6 Using the stack to pass the delay parameter.132

5.7 Making a copy of a block of data of arbitrary length.133

5.8 Using a frame to acquire temporary data; 6809 code.137

5.9 Using a Frame to acquire temporary data; 68000 code.139

xi xii LIST OF TABLES

6.1 6809 code displaying heart rate on an oscilloscope.155

6.2 68000 code displaying heart rate on an oscilloscope.160

6.3 Exception related instructions.162

7.1 Source code for the absolute assembler.173

7.2 A typical error file.173

7.3 Listing file produced from the source code in Table 7.1.174

7.4 Symbol file produced from the absolute source of Table 7.1.174

7.5 Some common absolute object file formats.176

7.6 A simple macro creating the modulus of the target operand.177

7.7 Assembling the Display module with the Microtec Relocatable assembler.181

7.8 Module 2 after assembly.183

7.9 Module 3 after assembly.184

7.10 Linking the three source modules.185

7.11 Output from the Microtec linker.187

7.12 A possible Lexical analysis ofsum = (n+1)*n/2;190

7.13 6809 target code forsum = (n+1) * n/2;193

7.14 Passing a simple program through the compiler of Fig. 7.5.197

8.1 Definition of functionsum_of_n().200

8.2 Variable storage class208

8.3 Initializing variables.210

8.4Coperators, their precedence and associativity.215

8.5 Bitwise AND and Shift operations.218

8.6 A nestedifReal-Time Clock interrupt service routine.225

8.7 Anelse-ifReal-Time Clock interrupt service routine.226

8.8 Generating factorials using theelse-ifconstruct.228

8.9 Generating factorials using theswitch-caseconstruct.230

8.10 Generating factorials using awhileloop.232

8.11 Generating factorials using aforloop.234

9.1 TheCprogram as a collection of functions.240

9.2 Generating factorials using a look-uptable.247

9.3 Altering an array with a function.250

9.4 Sending out a digit to a 7-segment port.256

9.5 Displaying and updating heartbeat.260

9.6 The PIA as a structure of pointers.265

9.7 Sending pointers to structures to a function.267

9.8 Unions.270

9.9 Using#definefor text replacement.272

9.10 A typicalmath.hlibrary header (with added comments).276

10.1 Elementary startupfor a 6809-based system.280

10.2 Using arrays of pointers to functions to construct a vector table.281

10.3 A simple Startup/Vector routine for a 68000-based system.282

10.4 AC-compatible assembler function evaluating the square root.283

10.5 Using in-line assembly code to set upthe System stack.284

10.6 Calling a resident function at a known address.286

10.7 6809 startupfor the system of Table 9.5.287

LIST OF TABLES xiii

10.8 68000 startupfor the system of Table 9.5.288

10.9clock()configured as an interrupt function.290

10.10A startupfor the Aztec compiler initializing statics/globals.294

10.11A typicallod68kfile to produce an image of initialized data in ROM295

10.12A startupinitializing statics/globals and setting uptheDPRfor zero page.296

10.13Zero-page storage with the Cosmic 6809 compiler.297

10.14A portableCprogram using ANSII library I/O routines.299

10.15Compiling the same source with a spectrum of CPUs.303

10.16Tailoring the ANSII I/O functions to suit an embedded target.305

12.1 Quantization parameters.326

12.2Cdriver for Fig. 12.11.340

14.1 The fundamentalCcoding.357

14.2 Thehard_09.hheader file.359

14.3 6809 code resulting from Tables 14.1 and 14.2.362

14.4 The 6809 Time Compressed Memory Startup.363

14.5 The machine-code file for the 6809-based time-compressed memory.364

14.6 The@portdirective.365

14.7 Using_asm()to terminate a NMI/IRQ type interrupt service function.366

14.8 Optimized 6809 code.370

14.9 68000 code resulting from Tables 14.1 and 14.2.373

14.10The 68000 Time Compressed Memory Startup.375

14.11Machine-code file from Tables 14.9 and 14.10.376

14.12The@portdirective.377

14.13Using_asm()to terminate an interrupt service function.378

14.14Optimized 68000 based code.381

15.1 Simulating the program of Table 4.10.386

15.2 Tracing the program of Table 2.9.387

15.3 Tracing aCfunction.389

15.4 A report on the variables used in the 68008 TCM system of Table 15.5.390

15.5 Complete 68008 package, including resident diagnostics.403

15.6 Code for the 68008 implementation.407

15.7 An alternative RAM testing module for the 6809 system.408

15.8 Memory Mapping and Testing.412

15.9 A window into the hardware using an ICE.413

16.1 A 6809-based assembly-level coding.417

16.2 A 68008-based assembly-level coding.419

PART I

Target Processors

A major advantage of the use of a high-level language is its independence of the hardware its generated code will eventually run on; that is, its portability. However, one of the main strands of this book is the interaction of software with its hardware environment, and thus it is essential to use real products in both domains. For clarity, rather than describing a multitude of devices, most of the examples are based on just two microprocessors. Two, rather than one, not to loose sight of the portability aspects of high-level code. In this part I describe the Motorola 6809 and 68000/8 microprocessors, the chosen devices. This gives us a hardware target spectrum ranging from 8 through

32-bit architecture. As both microprocessors share a common ancestor, the com-

plexity is reduced compared with a non-related selection. Where necessary, other processors are used as examples, but in general the principles are similar irre- spective of target. If the hardware detail seems excessive to a reader with a software background, much may be ignored if building the miniproject circuitry of Part 3 is to be omitted.

CHAPTER 1

The 6809 Microprocessor: Its

Hardware

The microprocessor revolution began in 1971 with the introduction of the Intel

4004 device. This featured a 4-bit data bus, direct addressing of 512 bytes of

memory and 128 peripheral ports. It was clocked at 108kHz and was imple- mented with a transistor count of 2300. Within a year, the 8-bit 200kHz 8008 appeared, addressing 16kbyte of memory and needing a 3500 transistor imple- mentation. The improved 8080 replacement appeared in 1974, followed a few months later by the Motorola 6800 MPU [1]. Both processors could directly ad- dress 64kbytes of memory through a 16-bit address bus and could be clocked at upto 2MHz. These two families, together with descendants and inspired close relatives, have remained the industry standards ever since. The Motorola 6800 MPU [2] was perceived to be the easier of the two to use by virtue of its single 5V supply requirement and a clean internal structure. The

8085 MPU is the current state of the art Intel 8-bit device. First produced in

1976, it has an on-board clock generator and requires only a single power supply,

but has a virtually identical instruction set to the 8080 device. Soon after Zilog produced its Z80 MPU which was upwardly compatible with Intel"s offering, then the market leader, with a much extended instruction set and additional internal registers [3]. The Motorola 6802/8 MPUs (1977) also have internal clock generators, with the former featuring 128 bytes of on-board RAM. This integration of support mem- ory and peripheral interface leads to the single-chip microcomputer unit (MCU) or micro-controller, exemplified by the 6801, 6805 and 8051 MCU families [4]. The

6809 MPU introduced in 1979 [5, 6, 7] was seen as Motorola"s answer to Zilog"s Z80

and these both represent the most powerful 8-bit devices currently available. By this date the focus was moving to 16- and 32-bit MPUs, and it is unlikely that there will be further significant developments in general-purpose 8-bit devices. Nevertheless, these latter generation 8-bit MPUs are powerful enough to act as the controller for the majority of embedded control applications, and their architec- ture is sophisticated enough to efficiently support the requirements of high-level languages; more of which in later chapters. Furthermore, many MCU families have a core and language derived from their allied 8-bit MPU cousins. 2

ARCHITECTURE 3

1.1 Architecture

The internal structure of a general purpose microprocessor can be partitioned into three functional areas:

1. The mill.

2. Register array.

3. Control circuitry.

Figure 1.1 shows a simplified schematic of the 6809 MPU viewed from this per- spective.

THE MILL

A rather old fashioned term used by Babbage [8] for his mechanical computer of the last century to identify the arithmetic and logic processor which `ground" the numbers. In our example the 6809 has an 8-bitarithmetic logic unit (ALU) implementing Addition, Subtraction, Multiplication, AND, OR, Exclusive-OR, NOT and Shift operations. Associated with theALUis theCode Condition (or Sta- tus) register(CCR). Five of the eightCCRbits indicate the status of the result of ALUprocesses. They are:Cindicating a Carry or borrow,Vfor 2"s complement oVerflow,Zfor a Zero result,Nfor Negative (or bit 7=1) andHfor the Half carry between bits3 and4. These flags are set as a result of executing an instruction, and are normally used either for testing and acting on the status of a process, or for multiple-byte operations. The remaining three bits are associated with inter- rupt handling. TheIbit is used to lock out or mask the IRQ interrupt, and the F bitcarries out the same function for the FIRQ interrupt. During an interrupt service routine theE flagmay be consulted to see if the Entire register state has been saved (IRQ, NMI and SWI) or not (FIRQ). More details are given in Section 6.1.

REGISTER ARRAY

The 6809 has two Data registers, termedAccumulators A and B. These Data reg- isters are normally targeted by theALUas the source and destination for at least one of its operands. ThusADDA #50adds 50 to the contents ofAccumulator_A(in register transfer language, RTL, this is symbolized as[A] <- [A] + 50, which reads `the contents ofregister Abecome the original contents ofAplus 50"). Op- erations requiring one operand can seemingly be done directly on external mem- ory; for example,INC 6000hwhich increments the contents of location6000h ([6000] <- [6000] + 1). The suffixhindicates the hexadecimal number base, whilstbdenotes binary. However, in reality the MPU executes this by bringing down the contents of6000h(written as[6000]), uses theALUto add one and returns it. Whilst this fetch and execute process is invisible to the programmer, the penalty is space and time;INC M(3 bytes length) takes 7μs andINCAorINCB (1byte length) takes 2μs (at a 1MHz clock rate). Thus while it is always better to use the Data registers for operands, this is difficult in practice because there are only two such registers. Unlike the older 6800 MPU, the 6809"s two 8-bit Data

4 C FOR THE MICROPROCESSOR ENGINEER

Figure 1.1Internal 6809/6309 structure.

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