[PDF] Innovation in ILD Polishing: Ultra-Low Defects and Reduced CoO

40111_3CMPUG_2005_06_Cabot.pdf

© 2005 Cabot Microelectronics Corporation

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Innovation in ILD Polishing:

Ultra-Low Defects and

Reduced CoO

June 2005

© 2005 Cabot Microelectronics Corporation

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Discussion Topics

•Dielectrics Polishing Needs - Why Ceria? •General Polish Mechanisms •Factors Contributing to Cost of Consumables •Polishing Results -Defects -Planarization •Summary

© 2005 Cabot Microelectronics Corporation

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Dielectrics Polishing Needs:

iDiel ™

6600Solution Development

•Market Needs (ILD) -Low Cost of Consumable per wafer -Ultra-Low defectivity -Similar Performance to Traditional Silica Based Slurries in

Other Areas

-Stable, Predictable Performance

© 2005 Cabot Microelectronics Corporation

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Ceria: The Misunderstood Abrasive

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Ceria is not really a "hard" particle

Si Si3N4 SiO 2

Initial Wafer Surface

Mohs

Hardness

6.5 - 7.0

9.0 ceria 6.0

© 2005 Cabot Microelectronics Corporation

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Ceria Is A Much More Efficient Abrasive

Silica System Ceria System

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Ceria vs. Silica Polishing Mechanisms

•Conventional Dielectric Polishing Mechanism -Silica Based Slurry -Ceria Based Slurry •New Chemistry Mechanisms on Dielectric Polishing for iDiel ™ 6600
-Rate Acceleration Mechanism -Morphology of Ceria on Defectivity

© 2005 Cabot Microelectronics Corporation

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Dielectric CMP Mechanism of Silica Based Slurry

Mechanical Abrasion Oriented

•Fumed/Colloidal Silica Based Slurry: -High abrasive concentration -Limited chemical contribution from high pH (dissolution)

Silica Surface

Si - O SiO SiO SiO Si SiO SiOH O Si Si SiO SiO Si SiO SiO O Si O SiH HH O SiH OH - O --- -- - -- ------ -

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9 + ++ + + Ceria

Silica Surface

Si - O SiO SiO SiO Si SiO SiOH O Si Si SiO SiO Si SiO SiO O Si O SiH HH O SiH OH - O oxoanion Particle Has Strong Chemical Interaction with Surface

Ceria Polishing Mechanism

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High Efficiency Rate Acceleration Chemistry

Ceria Rate Control Chemistry

0500100015002000250030003500

Ceria Particle Ceria Particle with Rate Control

Chemistry

PETEOS Removal Rate (A/min)

Higher Oxide Removal Rate with a Host of Rate Acceleration Molecules in Ceria Slurry Most Consistent Removal Rate with Chemistry Oriented Slurry

© 2005 Cabot Microelectronics Corporation

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Impact of Abrasive Morphology on Defectivity

To Lower Defect Count

Rounded Edge and Corner

Narrow Particle Size Distribution

Ceria A

Scale = 50 nm

Small, uniform particles

with rounded edges

Ceria B

Scale = 50 nm

Large, uncontrolled particles

with sharp edges

145363

470
187
1 42

0100200300400500

Ceria A Ceria B Ceria C

Defect Counts, pattern wafers

04080120160200

Scratch Number, pattern wafers

AIT Counts

Scratch Number

© 2005 Cabot Microelectronics Corporation

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Semi-Sperse® 25E

iDiel™6600

Abrasive Type

Chemistry

Particle Concentration

(POU) Ceria

High Purity (no KOH)

Rate Control Additives

< 0.50% pH ~ 11 KOH 12.5%

Fumed Silica

Mechanism

Balanced Chemical

& Mechanical

Primarily

mechanical

Method of Use

Single Component

2X Concentrate

Single Component

6X Concentrate

iDiel ™

6600 Comparison to Fumed Silica

© 2005 Cabot Microelectronics Corporation

13 iDiel ™

6600 Comparison to Fumed Silica

Semi-Sperse® 25E

iDiel™6600

Downforce

TEOS pattern RR

3 psi

6000 Å/min

4700 Å/min

4 psi

BPSG/PSG defects (norm.)

0.2X (80% reduction) 1X

TEOS defects (norm.)

1X 0.6X (40% reduction)

TEOS: SiN Selectivity

5:1 >50:1

© 2005 Cabot Microelectronics Corporation

14 iDiel ™

6600 Low Cost of Consumable

Semi-Sperse® 25E

iDiel™6600

Dilution

Typical Flowrate

6X

125 mL/min

150 mL/min

2X

Polish Time (8K step)

<100 sec

125 sec

$ for Transportation / Logistics +

33% Reduction in

Slurry Usage per Wafer

= CoC

© 2005 Cabot Microelectronics Corporation

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Flow RateTime to

PlanarizeSlurry Usage

1 1 1 85%
78%
66%

0%10%20%30%40%50%60%70%80%90%100%

iDiel 6600 TM

Slurry Usage Efficiency

Reduction in Slurry Usage per Wafer Pass measured on SKW 7 Wafers iDiel 6600Fumed Silica Product

Normalized to Fumed Silica

~ 33%

Reduction

in Slurry Usage iDiel ™

6600 Low Cost of Consumable

© 2005 Cabot Microelectronics Corporation

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Defectivity Reduction with iDiel™6600

Ref ILD6X141

Defectivity Comparison (SP1 total counts)

(

PSG Blanket Wafers, Post HF)

0

12345678910111213141516

Wafer Number

Defect Count per wafer

DCODCN

Fumed Silica Slurry

iDiel™6600 (Ceria)

© 2005 Cabot Microelectronics Corporation

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Example of Defect Classification by SEMVison

Class#25 : general micro-scratch

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Customer Validation of Microscratch Reduction

~ 50%

Reduction

on TEOS ~ 80%

Reduction

on PSG

Microscratch Count Comparison

0

Silica Based iDiel™6600

Slurry Type

Microscratch Count Per Wafer

PSGTEOS

© 2005 Cabot Microelectronics Corporation

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Planarization Efficiency of iDiel

™

6600 vs. SS25E

® on MIT Pattern

Oxide Thickness at 50% Pattern vs. 10% Field Loss

Mirra, 2-platen process, IC1000/Suba-IV3/3/3.5/100/118

0500010000150002000025000

0 1000 2000 3000 4000 5000 6000

10% Field Loss(Å)

Thickness at 50% Site (Å)

SS25EiDiel 6600

Equivalent Planarization Efficiency

© 2005 Cabot Microelectronics Corporation

20 iDiel ™

6600 Removal Rate On MIT Pattern

iDiel TM

6600: Thickness of "UP AREA" vs Time

Mirra, 2-platen process, IC1000/Suba-IV3/3/3.5/100/118

0500010000150002000025000

0 20 40 60 80 100 120 140 160

Time (sec)

Thickness (A) at 50% Site

SS25EiDiel 6600

~ 25% Reduction in Polish Time

© 2005 Cabot Microelectronics Corporation

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Summary

•Innovation Can Drive CoC Reduction •Unique Ceria Abrasive Properties Key To Achieving

Metrics

-High Efficiency Abrasive -Chemically Enhanced Mechanism -Low Defects -Low CoC