[PDF] Introduction to the DSP Subsystem in the IWR6843





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HWA MEM0 (16 KB)MEM1 (16 KB) MEM2 (16 KB)MEM3 (16 KB) FFT CFAR DSP L1P (32 KB) L2 (256KB) L1D (32 KB) C674x CPU

ADC Buffer

(32 KB)ADC Buffer (32 KB) EDMA engine L3 (1MB)

Handshake RAM

(32 KB)

Primarily for storing

the radar-cube

For sharing data (e.g.

detected objects) between

DSP and R4F (MSS).

Signal processing on the ADC

data (interference mitigation), advanced detection algorithms, highter layer algorithms

ADC data from the

digital front-end

Range, Doppler, Azimuth

FFTs, Detection (CFAR-CA)Efficient transfer of data between memories (ADC Buffer, L2, L3, HWA

MEM, Handshake RAM)

L2 program/data

128 KB

L2 program/data

128 KB

L3

1024 KB

L1P

32 KB256 bits

64 bits

L1D

32 KB64 bits256 bits256 bits

L1 runs at CPUT clock (600 MHz)

L2 runs at CPU/2 (300 MHz)

L3 runs at CPU/3 (200 MHz)

Input Formatter Output Formatter

Core

Computational

Unit Input samples

(24-bit I, 24-bit Q)

From Accelerator

local memoryTo Accelerator local memory

ACCELERATOR ENGINE

State Machine512-byte RAM

Trigger to DMA/Processor

Trigger from DMA/

Processor/Ping-Pong bufferOutput samples

(24-bit I, 24-bit Q)

Static (common)

registers

ACCEL_MEM0

(16 KB)ACCEL_MEM1 (16 KB)ACCEL_MEM2 (16 KB)ACCEL_MEM3 (16 KB)Accelerator Local Memories

128-bit wide bus interconnect

From/To

DMA/Processor

Parameter-Set

Config Memory

ADC

BufferInterference

Mitigation

(DSP L1)Range FFT (16 bit) L3

Doppler

FFT (16 bit) L3 Non

Coherent

Summation

L3/L2DetectionAngle-

FFTTracking/

ClusteringHandshake

Memory

radar-cuberadar-cube antennasantennas range range chirpschirps

Pre-Detection

Matrix

range doppler

LEGEND

HWA

DSP/HWA

DSP ADC

BufferInterference

Mitigation

(DSP L1)Range FFT (16 bit) L3

Doppler

FFT (24 bit)

L3/L2DetectionAngle-

FFTTracking/

ClusteringHandshake

Memory

radar-cube antennas range chirps

Pre-Detection

Matrix

range doppler

LEGEND

HWA

DSP/HWA

DSP Non

Coherent

Summation

DSP_fft16x3224136981614883503683116078

DSP_fft32x3226141395617724267836319914

DSPF_sp_fftS

PxSP305473106619624683916321740

Range bins

L3 Memory

Chirp 1

Chirp 2

Chirp N

DSP/HWA Memory

" Transpoose read speeds : 1 cycle (@200Mhz) per sample " One line of 256 samples takes 1.28 μs to be transferred from DSP memory to L3 After processing

128 chirps

256 x 4 rows

128 chirps

L3 Memory

Range FFT channel #1Range FFT channel #2Range FFT channel #3Range FF4T channel #2

L3 Memory

Transpose write speeds : 4

Cycles (@200MHz) per sample

-4 channel x 256

Samples/channels takes 21 us

To be transferred to L3

Data is contiguously placed

to Make subsequent transfer to DSP/HWA (for doppler processsing) fast.

256 samples

Text Here

Ant 1 Ant 4 Ant 3 Ant 5

HWA Processing:

FFT + windowing

Processing time is 6.5 μs for 4 Rx channelsATranspose transfer to L3

Will take 21 μs using 1 DMA

L3 Memory

B

Text Here

Ant 1 Ant 4 Ant 3 Ant 5

256 samples

Text Here

Range FFT channel #1

Range FFT channel #2

Range FFT channel #3

quotesdbs_dbs3.pdfusesText_6
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