[PDF] Unit 2 Instruction Set and Addressing modes

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Unit2

Instruction Set andAddressingmodes

8085 Programming registerand

programmingmodel purpose register, A, F, PC,SP.

8085 programmingmodel

Fetching & ExecutionCycles

38

FetchingCycles

stores it in the instruction register,and Moves the program counter on one so that it points to the next instruction.

Executecycle

The actual actions which occur during the execute cycle ofan instruction. Depend on both the instruction itself and the addressing mode

Fetching aninstruction

Step1:Instruction pointer (program counter) holdthe address of the next instruction to befetch. 4 Step2 5 Step3 6 Step4 7 Step5 8 Step6 44

Data flow from memory toMPU

Steps and data flow, when the

instructioncode01001111(4FH

ȂMOVC,A)storedinthe

location 2005H, is beingfetch.

Fetch Cycle:To fetch thebyte,

2005
flow the MPU needs to identifythe and from memorylocation enablethedata memory out according to theinstruction.

8085Instruction

Since the 8085 is an 8-bit device it can have up to 28 (256) instructions. instructions. Theseinstructionscanbegrouped intofivedifferentgroups

Data TransferOperations

ArithmeticOperations

LogicOperations

BranchOperations

Machine ControlOperations

InstructionFormats

Each instruction has twoparts.

performed. given in variousform. It can specify in various ways: may include 8 bit/16 bit data, aninternal register, memory location or 8 bit /16 bitaddress.

ForEg.:MVIA,02H

OpcodeOperand

Instruction wordSize

theinstruction One-byte or oneword Instructions: opcode and operand in 8 bits only i.e. one byte. Operand(s) are internal register and are coded into the instruction. e.g. MOV, ADD, ANA, SUB, ORAetc.

MOVA,B

01 111 000 =78H

Move the content of B inA

01 for MOV operation, 111 binary code for

registerAand last000binarycodeforregisterB

TaskOp-codeOperandBinary

Code Hex Code

Copy the contents of theaccumulator

in the registerC.

MOVC,A010011114FH

Add the contents of register B tothe

contents of theaccumulator.

ADDB1000 000080H

Invert (compliment) each bit inthe

accumulator.

CMA0010 11112FH

Two-byte instructions: first byte is opcode in 8 bits and second byte is operand either 8 bit data or 8 bitaddress. e.g. MVI, ADI, ANI, ORI, XRIetc.

MVIB,05H

06,05

Move 05 in registerB

MVIB, 05H in the code form

TaskOp-codeOperandBinary

Code Hex Code

Load an 8-bit data bytein

theaccumulator.

MVIA,Data00111110

DATA

3E (FirstByte)

Data(Second

Byte)

MnemonicsHexcode

MVI A,32H3E32H

third byte are operand either 16 bit data or 16 bitaddress.

Operand 1 = lower 8 bit data/address

Operand 2 = Higher 8 bitdata/address

opcode+databyte+databyte e.g. LXI, LDA, STA, LHLD, SHLDetc.

LXIH ,2500H

21,00,25

load HL pair with 2500H

LXIH , 2500H in codeform

TaskOp-

code

OperandBinary

Code Hex Code Hex Code

Transfer theprogramJMP2085H11000011C3FirstByte

sequence to thememory

Location2085H.1000010185Second

Byte

0010000020

ThirdByte

OpcodeFormat

used, memory to be usedetc.

Fixed for eachinstruction.

Register

pair Code BC00 DE01 HL10

A, F,SP11

RegisterCode

B000 C001 D010 E011 H100 L101 M110 A111

AddressingModes

The various formats for specifying operands/data are called the ADDRESSING MODES. 8085 instructionscanbeclassified infollowingaddressing modes

Register Addressingmode

Data is provided through the registers .e.g. MOV, ADD, SUB, ANA, ORA, XRAetc.

ForEx.MOV A, B

78H
move the content of register B to registerA. opcode of MOVA,B

Immediate Addressingmode

Data is present in the instruction. Load the immediate data to the destination provided. e.g. MVI, LXI,

ADI, SUI, ANI, ORIetc.

ForEx.MVI A,05H

3E,05 move the 05H in registerA. opcode of MVI A,05H

Direct Addressingmode

Instructions have their operands in memory and the 16-bit memory address is specified in the instruction The address of the operand is given in the instruction. e.g. LDA, STA, LHLD, SHLDetc.

ForEx.

STA7500

32 , 00,75

store the content of accumulator in the memory location 7500H opcode of STA7500 IN 01 DB,01Read data from port01. opcode of IN01

Indirect Addressingmode

PUSH,POPetc.

LXI H,7500

MOV A,M

load HL pair with7500H move the content of memorylocation, whose address is in HL pair to theaccumulator

Implicit or Implied Addressingmode

The operand is not specified in the instruction, specified within the opcode itself. Operand is supposed to be present in accumulator. e.g. CMA, CMC,STC etc.

InstructionSet

instructions. total of 74instructions. Most of the instructions have more than oneformat.

Data TransferOperations

ArithmeticOperations

LogicOperations

BranchOperations

Machine ControlOperations

(A)Data Transferoperation destination.

Theytransfer:

Data betweenregisters.

DataBytetoaregisterormemorylocation.

Databetweenamemorylocationandaregister.

DatabetweenanI/ODeviceandtheaccumulator.

Thedatainthesourceisnotchanged.

e.g. LDA, STA, MOV, LDAX, STAX, MVI, LXIetc. (B)ArithmeticOperation These operations are always performed with accumulator as one of the operands. (C)LogicalOperation accumulator

Logical instructions also modify the flagbits.

Op-codes for logical instructions include ANA, ANI, ORA, ORI, XRA,

XRI, CMA, CMC, RAL, RLC, RAR, RRC, CMP, CPIetc.

Rotate-Each bit in the accumulator can be shifted either left or right to the next position. compared forequality,greaterthan,orlessthan,withthecontentsoftheaccumulator. (D)BranchOperation To jump from one memory location to any other memory location withina program unconditionally Unconditional branch instructions-Transfer the program to the specified labelor address JMP unconditionally i.e. without satisfying anycondition.

Unconditional Program control instructionsare

Call &RET

Conditional branch instructions -Transfer the program to the specified labelor address when certain condition issatisfied.

JNC, JC, JNZ, JZ, JP, JM, JPE,JPO

CNC, CC, CNZ, CZ, CP, CM, CPE,CPO

quotesdbs_dbs21.pdfusesText_27

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