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© Freescale Semiconductor, Inc., 2005. All rights reserved.

Freescale Semiconductor

Reference Guide

M68HC11ERG

Rev. 2.1, 07/2005

M68HC11E Series Programming

Reference Guide

Block DiagramPC7/ADDR7/DATA7

PC6/ADDR6/DATA6

PC5/ADDR5/DATA5

PC4/ADDR4/DATA4

PC3/ADDR3/DATA3

PC2/ADDR2/DATA2

PC1/ADDR1/DATA1

PC0/ADDR0/DATA0

MODE CONTROL

OSC

CLOCK LOGIC

INTERRUPT

LOGIC

EEPROM

(SEE TABLE) RAM (SEE TABLE)

SERIAL

PERIPHERAL

INTERFACE

SPI

SERIAL

COMMUNICATION

INTERFACE

SCI

M68HC11 CPU

A/D CONVERTER

CONTROL

PORT D

PORT E

PE7/AN7TxD

RxDSS SCK MOSI

MISOPD5/SS

PD0/RxDSTRA/AS

STRB/R/W

ADDRESS/DATABUS EXPANSION

ADDRESS

AS

STROBE AND HANDSHAKE

PARALLEL I/O

STRB STRA

CONTROL

PORT C

PORT B

PB7/ADDR15

PORT A

PA7/PAI

TIMER

SYSTEM

COPPULSE ACCUMULATOR

OC2 OC3 OC4

OC5/IC4/OC1

IC1 IC2

IC3PAI

PERIODIC INTERRUPT

MODA/

LIRMODB/V

STBY

XTAL EXTAL E IRQXIRQ/V

PPE* RESET

PD4/SCK

PD3/MOSI

PD2/MISO

PD1/TxDR/W

PA6/OC2/OC1

PA5/OC3/OC1

PA4/OC4/OC1

PA3/OC5/IC4/OC1

PA2/IC1

PA1/IC2

PA0/IC3

PB6/ADDR14

PB5/ADDR13

PB4/ADDR12

PB3/ADDR11

PB2/ADDR10

PB1/ADDR9

PB0/ADDR8PE6/AN6

PE5/AN5

PE4/AN4

PE3/AN3

PE2/AN2

PE1/AN1

PE0/AN0

V DD V SS V RH V RL * V PPE applies only to devices with EPROM/OTPROM.ROM OR EPROM (SEE TABLE)

MC68HC11E0

DEVICE

512
512
512
512
768

768RAM

12 K 20 K - ROM 12 K

20 KEPROM

512
512
512
512

512EEPROM

MC68HC11E1

MC68HC11E9

MC68HC711E9

MC68HC11E20

MC68HC711E20256 - - 2048MC68HC811E2

M68HC11E Series Programming Reference Guide, Rev. 2.1

2Freescale SemiconductorDevices Covered in This Reference Guide

Devices Covered in This Reference Guide

M68HC11E Series Programming Model

Device RAM ROM EPROM EEPROM

MC68HC11E0 512 - - -

MC68HC11E1 512 - - 512

MC68HC11E9 512 12K - 512

MC68HC711E9 512 - 12K 512

MC68HC11E20 768 20K - 512

MC68HC711E20 768 - 10K 512

MC68HC811E2 256 - - 2048

8-BIT ACCUMULATORS A & B7070

15 0AB

D IX IY SP PC 70

CVZNIHXS

OR 16-BIT DOUBLE ACCUMULATOR D

INDEX REGISTER X

INDEX REGISTER Y

STACK POINTER

PROGRAM COUNTER

CARRY/BORROW FROM MSB

OVERFLOW

ZERO

NEGATIVE

I-INTERRUPT MASK

HALF CARRY (FROM BIT 3)

X-INTERRUPT MASK

STOP DISABLECONDITION CODES

Crystal Dependent Timer Summary

M68HC11E Series Programming Reference Guide, Rev. 2.1

Freescale Semiconductor3

Crystal Dependent Timer Summary

Selected CrystalCommon XTAL Frequencies

4.0 MHz 8.0 MHz 12.0 MHz

CPU Clock (E) 1.0 MHz 2.0 MHz 3.0 MHz

Cycle Time (1/E) 1000 ns 500 ns 333 ns

Pulse Accumulator (in Gated Mode)

(E/2 6 (E/2 14 )1 count - overflow - 64.0 μs

16.384 ms32.0 μs

8.192 ms21.330 μs

5.491 ms

PR[1:0] Main Timer Count Rates

(E/1) (E/2 16 )0 0

1 count -

overflow - 1.0 μs

65.536 ms500 ns

32.768 ms333 ns

21.845 ms

(E/4) (E/2 18 )0 1

1 count -

overflow - 4.0 μs

262.14 ms2.0 μs

131.07 ms1.333 μs

87.381 ms

(E/8) (E/2 19 )1 0

1 count -

overflow - 8.0 μs

524.29 ms4.0 μs

262.14 ms2.667 μs

174.76 ms

(E/16) (E/2 20 )1 1

1 count -

overflow - 16.0 μs

1.049 s8.0 μs

524.29 ms5.333 μs

349.52 ms

RTR[1:0] Periodic (RTI) Interrupt Rates

(E/2 13 (E/2 14 (E/2 15 (E/2 16 )0 0 0 1 1 0

1 18.192 ms

16.384 ms

32.768 ms

65.536 ms4.096 ms

8.192 ms

16.384 ms

32.768 ms2.731 ms

5.461 ms

10.923 ms

21.845 ms

CR[1:0] COP Watchdog Timeout Rates

(E/2 15 (E/2 17 (E/2 19 (E/2 21
)0 0 0 1 1 0

1 132.768 ms

131.072 ms

524.288 ms

2.097 s16.384 ms

65.536 ms

262.14 ms

1.049 s10.923 ms

43.691 ms

174.76 ms

699.05 ms

(E/2 15 )Timeout tolerance (-0 ms/+...) 32.8 ms 16.4 ms 10.9 ms M68HC11E Series Programming Reference Guide, Rev. 2.1

4Freescale SemiconductorInterrupt Vector Assignments

Interrupt Vector Assignments

VectorAddressInterruptSourceCCR

Mask BitLocal

Mask

FFC0, C1 - FFD4, D5 Reserved - -

FFD6, D7

SCI serial system

(1) SCI receive data register full SCI receiver overrun SCI transmit data register empty SCI transmit complete SCI idle line detect

NOTES:

1. Interrupts generated by SCI; read SCSR to determine source. Refer to HPRIO register to

determine priority of interrupt.I RIE RIE TIE TCIE ILIE

FFD8, D9 SPI serial transfer complete I SPIE

FFDA, DB Pulse accumulator input edge I PAII

FFDC, DD Pulse accumulator overflow I PAOVI

FFDE, DF Timer overflow I TOI

FFE0, E1 Timer input capture 4/output compare 5 I I4/O5I

FFE2, E3 Timer output compare 4 I OC4I

FFE4, E5 Timer output compare 3 I OC3I

FFE6, E7 Timer output compare 2 I OC2I

FFE8, E9 Timer output compare 1 I OC1I

FFEA, EB Timer input capture 3 I IC3I

FFEC, ED Timer input capture 2 I IC2I

FFEE, EF Timer input capture 1 I IC1I

FFF0, F1 Real-time interrupt I RTII

FFF2, F3 IRQ

(external pin) I None

FFF4, F5 XIRQ

pin X None

FFF6, F7 Software interrupt None None

FFF8, F9 Illegal opcode trap None None

FFFA, FB COP failure None NOCOP

FFFC, FD Clock monitor fail None CME

FFFE, FF RESET

None None

M68HC11E Series Memory Maps

M68HC11E Series Programming Reference Guide, Rev. 2.1

Freescale Semiconductor5

M68HC11E Series Memory Maps

Figure 1. Memory Map for MC68HC11E0

Figure 2. Memory Map for MC68HC11E1

FFC0

FFFFNORMAL

MODES

INTERRUPT

VECTORS64-BYTE REGISTER BLOCK

512 BYTES RAM

BOOTSTRAP SPECIAL

TEST EXT 0000 1000
103F
BF00

EXPANDEDBFFF

BFC0

BFFFSPECIAL MODES

INTERRUPT

VECTORS

BOOT ROM

EXTEXT

01FF EXT $0000 $1000 $B600 $D000 $FFFF FFC0

FFFFNORMAL

MODES

INTERRUPT

VECTORS64-BYTE REGISTER BLOCK

512 BYTES RAM

BOOTSTRAP SPECIAL

TEST EXT $0000 $1000 $B600 $D000 $FFFF 0000 1000
103F
BF00

EXPANDEDBFFF

BFC0

BFFFSPECIAL MODES

INTERRUPT

VECTORS

B600

B7FF512 BYTES EEPROM

BOOT ROM

EXTEXT

EXT 01FF EXT EXT M68HC11E Series Programming Reference Guide, Rev. 2.1

6Freescale SemiconductorM68HC11E Series Memory Maps

Figure 3. Memory Map for MC68HC(7)11E9

Figure 4. Memory Map for MC68HC(7)11E20

FFC0

FFFFNORMAL

MODES

INTERRUPT

VECTORS64-BYTE REGISTER BLOCK

512 BYTES RAM

SINGLE

CHIPBOOTSTRAP SPECIAL

TEST EXT $0000 $1000 $B600 $D000 $FFFF 0000 1000
103F
BF00

EXPANDEDD000

FFFFBFFF

BFC0

BFFFSPECIAL MODES

INTERRUPT

VECTORS

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