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8086/8088 Machine language
Instruction format, Addressing
Modes, Data addressing,
Program memory & stack
addressing mode
Software
yThe sequence of commands used to tell a microcomputer what to do is called a program, yEach command in a program is called an instruction y8088 understands and performs operations for 117 basic instructions yThe native language of the IBM PC is the machine language of the 8088 yA program written in machine language is referred to as machine code
yIn 8088 assembly language, each of the operations is described by alphanumeric symbols instead of 0-1s.
ADDAX, BX
(Opcode) (Destination operand) (Source operand)
Instructions
LABEL: INSTRUCTION ; COMMENT
Address identifierDoes not generate any machine
code yEx. START:MOV AX, BX; copy BX into AX yThere is a one-to-one relationship between assembly and machine language instructions yA compiled machine code implementation of a program written in a high-level language results in inefficient code
²More machine language instructions than an
assembled version of an equivalent handwritten assembly language program yTwo key benefits of assembly language programming
²It takes up less memory
²It executes much faster
Applications
yOne of the most beneficial uses of assembly language programming is real-time applications. Real time means the task required by the application must be completed before any other input to the program that will alter its operation can occur For example the device service routine which controls the operation of the floppy disk drive is a good example that is usually written in assembly language yAssembly language not only good for controlling hardware devices but also performing pure software operations ²Searching through a large table of data for a special string of characters
²Code translation from ASCII to EBCDIC
²Table sort routines
²Mathematical routines
Assembly language: perform real-time operations
High-level languages: used to write those parts
that are not time critical
Converting Assembly Language Instructions to
Machine Code
yAn instruction can be coded with 1 to 6 bytes yByte 1 contains three kinds of information ²Opcode field (6 bits) specifies the operation (add, subtract, move) ²Register Direction Bit (D bit) Tells the register operand in REG field in byte 2 is source or destination operand
1: destination 0: source
-Data Size Bit (W bit) Specifies whether the operation will be performed on
8-bit or 16-bit data
0: 8 bits1: 16 bits
15 -------10987 ----65 ----32 ----0
yByte 2 has three fields
²Mode field (MOD)
²Register field (REG) used to identify the register for the first operand
²Register/memory field (R/M field)
2 bit MOD field and 3 bit
Mode Field encoding
R/M field together specify the
second operand
Register/memory (R/M) Field Encoding
Examples
MOV BL,AL(88C316)
Opcode for MOV = 100010
D = 0 (AL source operand)
W bit = 0 (8-bits)
Therefore byte 1 is 100010002=8816
02G 11 UHJLVPHU PRGH
5(* 000 ŃRGH IRU $I
5C0 011 GHVPLQMPLRQ LV %I
Therefore Byte 2 is 110000112=C316
Examples:
MOV BL, AL = 10001000 11000011 = 88 C3h
ADD AX, [SI] = 00000011 00000100 = 03 04 h
ADD [BX] [DI] + 1234h, AX = 00000001 10000001 __ __ h =
01 81 34 12 h
Addressing Modes and
Formats
Addressing Modes
yImmediate yDirect yIndirect yRegister yRegister Indirect yDisplacement (Indexed) yStack
Immediate Addressing
yOperand is part of instruction yOperand = address field ye.g. ADD 5
ŃAdd 5 to contents of accumulator
Ń5 is operand
yNo memory reference to fetch data yFast yLimited range
Immediate Addressing Diagram
OperandOpcode
Instruction
Direct Addressing
yAddress field contains address of operand yEffective address (EA) = address field (A) ye.g. ADD A
ŃAdd contents of cell A to accumulator
ŃLook in memory at address A for operand
ySingle memory reference to access data yNo additional calculations to work out effective address yLimited address space
Direct Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
Indirect Addressing (1)
yMemory cell pointed to by address field contains the address of (pointer to) the operand yEA = (A) ŃLook in A, find address (A) and look there for operand ye.g. ADD (A)
ŃAdd contents of cell pointed to by contents
of A to accumulator
Indirect Addressing (2)
yLarge address space y2nwhere n = word length yMay be nested, multilevel, cascaded
Ńe.g. EA = (((A)))
xDraw the diagram yourself yMultiple memory accesses to find operand yHence slower
Indirect Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
Pointer to operand
Register Addressing (1)
yOperand is held in register named in address filed yEA = R yLimited number of registers yVery small address field needed
ŃShorter instructions
ŃFaster instruction fetch
Register Addressing (2)
yNo memory access yVery fast execution yVery limited address space yMultiple registers helps performance
ŃRequires good assembly programming or
compiler writing
ŃN.B. C programming
xregister int a; yc.f. Direct addressing
Register Addressing Diagram
Register Address ROpcode
Instruction
Registers
Operand
Register Indirect Addressing
yC.f. indirect addressing yEA = (R) yOperand is in memory cell pointed to by contents of register R yLarge address space (2n) yOne fewer memory access than indirect addressing
Register Indirect Addressing Diagram
Register Address ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
Displacement Addressing
yEA = A + (R) yAddress field hold two values
ŃA = base value
ŃR = register that holds displacement
Ńor vice versa
Displacement Addressing Diagram
Register ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
Address A
Relative Addressing
yA version of displacement addressing yR = Program counter, PC yEA = A + (PC) yi.e. get operand from A cells from current location pointed to by PC yc.f locality of reference & cache usage Base
Register Addressing
yA holds displacement yR holds pointer to base address yR may be explicit or implicit ye.g. segment registers in 80x86
Indexed Addressing
yA = base yR = displacement yEA = A + R yGood for accessing arrays
ŃEA = A + R
ŃR++
Combinations
yPostindex yEA = (A) + (R) yPreindex yEA = (A+(R)) y(Draw the diagrams)
Stack Addressing
yOperand is (implicitly) on top of stack ye.g.
ŃADDPop top two items from stack
and add x86 Addressing Modes yVirtual or effective address is offset into segment ŃStarting address plus offset gives linear address ŃThis goes through page translation if paging enabled y12 addressing modes available
ŃImmediate
ŃRegister operand
ŃDisplacement
ŃBase
ŃBase with displacement
ŃScaled index with displacement
ŃBase with index and displacement
ŃBase scaled index with displacement
ŃRelative
x86 Addressing Mode Calculation
ARM Addressing Modes
Load/Store
yOnly instructions that reference memory yIndirectly through base register plus offset yOffset ŃOffset added to or subtracted from base register contents to form the memory address yPreindex ŃMemory address is formed as for offset addressing ŃMemory address also written back to base register ŃSo base register value incremented or decremented by offset value yPostindex
ŃMemory address is base register value
ŃOffset added or subtractedResult written back to base register yBase register acts as index register for preindex and postindex addressing yOffset either immediate value in instruction or another register yIf register scaled register addressing available ŃOffset register value scaled by shift operator
ŃInstruction specifies shift size
ARM
Indexing
Methods
ARM Data Processing Instruction Addressing
& Branch Instructions yData Processing
ŃRegister addressing
xValue in register operands may be scaled using a shift operator
ŃOr mixture of register and immediate
addressing yBranch
ŃImmediate
ŃInstruction contains 24 bit value
ŃShifted 2 bits left
xOn word boundary xEffective range +/-32MB from PC.
ARM Load/Store Multiple
Addressing
yLoad/store subset of general-purpose registers y16-bit instruction field specifies list of registers ySequential range of memory addresses yIncrement after, increment before, decrement after, and decrement before yBase register specifies main memory address yIncrementing or decrementing starts before or after first memory access
ARM Load/Store Multiple Addressing Diagram
Instruction Formats
yLayout of bits in an instruction yIncludes opcode yIncludes (implicit or explicit) operand(s) yUsually more than one instruction format in an instruction set
Instruction Length
yAffected by and affects:
ŃMemory size
ŃMemory organization
ŃBus structure
ŃCPU complexity
ŃCPU speed
yTrade off between powerful instruction repertoire and saving space
Allocation of Bits
yNumber of addressing modes yNumber of operands yRegister versus memory yNumber of register sets yAddress range yAddress granularity PDP
8 Instruction Format
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