Elements of Computing Systems, Nisan Schocken, MIT Press, www nand2tetris , Chapter 4: Machine Language slide 2 Where we are at: Assembler
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Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 1
www.nand2tetris.orgBuilding a Modern Computer From First PrinciplesMachine (Assembly) Language
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 2
Where we are at:
Assembler
Chapter 6
H.L. Language
Operating Sys.
abstract interfaceCompiler
Chapters 10 - 11
VM TranslatorChapters 7 - 8
Computer
ArchitectureChapters 4 - 5
Gate Logic
Chapters 1 - 3
Electrical
Engineering
Physics
Virtual
Machine
abstract interfaceSoftware
hierarchyAssembly
Language
abstract interfaceHardware
hierarchyMachine
Language
abstract interfaceHardware
Platform
abstract interfaceChips &
Logic Gates
abstract interface HumanThought
Abstract design
Chapters 9, 12
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 3
Machine language
Abstraction - implementation duality:Machine language ( = instruction set) can be viewed as a programmer-
oriented abstraction of the hardware platform The hardware platform can be viewed as a physical means for realizing the machine language abstractionElements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 4
Machine language
Abstraction - implementation duality:Machine language ( = instruction set) can be viewed as a programmer-
oriented abstraction of the hardware platform The hardware platform can be viewed as a physical means for realizing the machine language abstraction Another duality:Binary version:0001 0001 0010 0011 (machine code)Symbolic versionADD R1, R2, R3 (assembly)
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 5
Machine language
Abstraction - implementation duality:Machine language ( = instruction set) can be viewed as a programmer-
oriented abstraction of the hardware platform The hardware platform can be viewed as a physical means for realizing the machine language abstractionAnother duality:Binary version
Symbolic version
Loose definition:
Machine language = an agreed-upon formalism for manipulating a memory using a processor and a set of registers Same spirit but different syntax across different hardware platforms. ALU combinationalMemory
stateElements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 6
Lecture plan
Machine languages at a glance
The Hack machine language:
Symbolic version
Binary version
Perspective
(The assembler will be covered in chapter 6).Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 7
Typical machine language commands (3 types)
ALU operations
Memory access operations
(addressing mode: how to specify operands)Immediate addressing, LDA R1, 67// R1=67
Direct addressing, LD R1, 67// R1=M[67]
Indirect addressing, LDI R1, R2// R1=M[R2]
Flow control operations
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 8
Typical machine language commands
(a small sample) // In what follows R1,R2,R3 are registers, PC is program counter, // and addr is some value.ADD R1,R2,R3 // R1 R2 + R3
ADDI R1,R2,addr // R1 R2 + addr
AND R1,R1,R2 // R1 R1 and R2 (bit-wise)
JMP addr // PC addr
JEQ R1,R2,addr // IF R1 == R2 THEN PC addr ELSE PC++LOAD R1, addr // R1 RAM[addr]
STORE R1, addr // RAM[addr] R1
NOP // Do nothing
// Etc. - some 50-300 command variantsElements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 9
The Hack computer
A 16-bit machine consisting of the following elements:Data memory:RAM- an addressable sequence of registersInstruction memory:ROM- an addressable sequence of registersRegisters:D, A, M, where M stands forRAM[A] Processing:ALU, capable of computing various functionsProgram counter:PC, holding an addressControl: The ROMis loaded with a sequence of 16-bit instructions, one per memory
location, beginning at address 0. Fetch-execute cycle: later Instruction set: Two instructions: A-instruction, C-instruction.Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 10
The Hack computer
A 16-bit machine consisting of the following elements:Computer
resetKeyboard
Screen
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 11
The Hack computer
A 16-bit machine consisting of the following elements: Both memory chips are 16-bit wide and have 15-bit address space. DataMemory
(Memory) instruction CPUInstruction
Memory
(ROM32K) inM outMaddressMwriteM pc resetElements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 12
The Hack computer
A 16-bit machine consisting of the following elements: ALU Mux D Mux reset inM addressM pc outM A/M instruction decode C C C C C D A PC C C AA A MALU output
writeM C CElements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 13
The A-instruction
@value // A value Where value is either a number or a symbol referring to some number.Used for:Entering a constant value
( A value) @17 // A = 17D = A // D = 17
Coding example:
@17 // A = 17D = M // D = RAM[17]
Selecting a
RAM location ( register RAM[A]) @17 // A = 17JMP // fetch the instruction
// stored in ROM[17]Selecting a
ROM location ( PC= A ) Why A-instruction? It is impossible to pack both addr and instr into 16 bits.Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 14
The C-instruction
(first approximation)Exercise: Implement the following tasks
using Hack commands:SetDtoA-1
Set bothAandDtoA + 1
SetDto19
Set bothAandDtoA + D
SetRAM[5034]toD - 1
SetRAM[53]to171
Add 1 toRAM[7], and store the result inD dest= x+ y dest= x-y dest= x dest= 0 dest= 1 dest= -1 x {A D M} y {A D M 1} dest {A D M MD AM AD AMD null}Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 15
The C-instruction
(first approximation)Exercise: Implement the following tasks
using Hack commands: 1.SetDtoA-1
2.Set bothAandDtoA + 1
3.SetDto19
4.Set bothAandDtoA + D
5.SetRAM[5034]toD - 1
6.SetRAM[53]to171
7. Add 1 toRAM[7], and store the result inD1. D = A-1
2. AD=A+1
3. @19
D=A4. AD=A+D
5. @5034
M=D-16. @171
D=A @53 M=D 7. @7 D=M+1Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 16
The C-instruction
(first approximation) j 3012 sum 4500 q 3812 arr 20561 Symbol table: (All symbols and values are arbitrary examples)Exercise: Implement the following tasks
using Hack commands: sum = 0 j = j + 1 q = sum + 12 - j arr[3] = -1 arr[j] = 0 arr[j] = 17 etc. dest= x+ y dest= x-y dest= x dest= 0 dest= 1 dest= -1 x {A D M} y {A D M 1} dest {A D M MD AM AD AMD null}Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 17
The C-instruction
(first approximation)Exercise: Implement the following tasks
using Hack commands: 1. sum = 0 2. j = j + 1 3. q = sum + 12 - j 4. arr[3] = -1 5. arr[j] = 0 6. arr[j] = 17 7. etc.1. @sum
M=0 2. @j M=M+13. @sum
D=M @12 D=D+A @j D=D-M @qM=D 4. @arr
D=A @3 A=D+A M=-1 5. @j D=M @arr A=A+DM=06. @j
D=M @arr D=A+D @ptr M=D @17 D=A @ptr A=M M=DElements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 18
Control
(focus on the yellow chips only) ALU Mux D A/M a-bitD register
A registerA
MRAM(selected
register)ROM(selected register) PCInstruction
In the Hack architecture:
ROM= instruction memory
Program = sequence of 16-bit
numbers, starting atROM[0]
Current instruction = ROM[PC]
To select instruction
n from the ROM, we set Ato n , using the instruction @n address input address inputElements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 4: Machine Languageslide 19