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Assembler Language Programming
for
IBM System z
? Servers
Version 2.00
John R. Ehrman
IBM Silicon Valley Lab
Second Edition (February 2016)
IBM welcomes your comments. Please address them to
John Ehrman
IBM Silicon Valley Lab
555 Bailey Avenue
San Jose, CA 95141
ehrman@us.ibm.com ? Copyright IBM Corporation 2015
US Government Users Restricted Rights
- Use, duplication or disclosure restricted by GSA ADP Schedule
Contract with IBM Corp.
iiAssembler Language Programming for IBM System z? Servers Version 2.00
Contents
Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .xvi
Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .xxix
Foreword . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Outline and Overview
...................................... 1
Programming Environments
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
Levels of Difficulty (*)
...................................... 2
Exercises and Programming Problems
............................. 2
Some Personal Observations
.................................. 2
Von Neumann Architecture
................................... 5
Why Program in Assembler Language (and Why Not)?
................... 5
Assembler Language Misconceptions
............................. 8 Chapter I: Getting Started..................................... 11
1. Some Basic Items
....................................... 12
1.1. Notation and Terminology
............................... 12
1.2. Instruction Elements
.................................. 13
1.2.1. Register Names
................................... 14
2. Binary and Hexadecimal Numbers
.............................. 16
2.1. Positional Notation and Binary Numbers
...................... 16
2.2. Hexadecimal Numbers
................................. 17
2.3. Converting Integers from One Base to Another (*)
................. 19
2.4. Examples of General Conversions (*)
......................... 22
2.5. Number Representations
................................ 24
2.6. Logical (Unsigned) Representation
.......................... 25
2.7. Two's Complement (Signed) Representation (*)
.................. 25
2.8. Computing Two"s Complements
........................... 27
2.9. Sign Extension
...................................... 30
2.10. Binary Addition
.................................... 31
2.11. Binary Subtraction
...................................32
2.12. How Additions and Subtractions Are Actually Performed (*)
.......... 34
2.13. A Circular View of Binary Arithmetic (*)
...................... 36
2.14. Logical (Unsigned) and Arithmetic (Signed) Results (*)
............. 37
2.15. Examples of Representations (*)
........................... 38 Chapter II: System z........................................ 41
3. Conceptual Structure of System z
.............................. 42
3.1. Memory Organization
.................................. 43
3.2. Central Processing Unit
................................. 45
3.3. General Registers
.................................... 45
3.4. Floating-Point Registers
................................ 46
3.5. Program Status Word (PSW)
............................. 47
3.6. Other Registers
...................................... 48
3.7. Input-Output (I/O)
................................... 48
3.8. Features, Facilities, and Assists
............................ 48
3.9. Microprograms and Millicode (*)
........................... 48
4. Instruction Execution
..................................... 50
4.1. Basic Instruction Cycle
................................. 50
4.2. Basic Instruction Types
................................. 51
4.3. Instruction Lengths
................................... 53
4.4. Some Operation Codes (*)
............................... 54
4.5. Interruptions (*)
..................................... 55
4.6. Exceptions and Program Interruptions (*)
...................... 56
4.7. Machine Language and Assembler Language
.................... 58
4.8. Processor Evolution
................................... 59
5. Memory Addressing
...................................... 61
5.1. The Addressing Halfword
................................ 62
Contentsiii
5.2. Examples of Effective Addresses............................ 63
5.3.Indexing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63
5.4. Examples of Indexing
.................................. 65
5.5. Addressing Problems (*)
................................ 66
5.6. Address Translation and Virtual Memory (*)
.................... 67
5.7.Summary
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68 Chapter III: Assembler Language Programs.......................... 71
6. Assembler Language
...................................... 72
6.1. Processing Your Program
................................ 72
6.1.1. Assembly
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72
6.1.2.Linking
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
6.1.3. Loading and Execution
.............................. 73
6.2. Preparing Assembler Language Statements
...................... 74
6.3. Statement Fields
..................................... 76
6.3.1. What"s in a Name Field? (*)
........................... 79
6.4. Writing Programs
.................................... 79
6.5. A Sample Program
................................... 80
6.6. Basic Macro Instructions
................................ 82
6.7.Summary
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82
7. Self-Defining Terms and Symbols
.............................. 85
7.1. Self-Defining Terms
................................... 85
7.2. EBCDIC Character Representation
.......................... 87
7.3. Symbols and Attributes
................................. 89
7.4. Program Relocatability
................................. 91
7.5. The Location Counter
................................. 92
7.6. Assigning Values to Symbols
.............................. 93
7.7. Symbols and Variables
................................. 94
8. Terms, Operators, Expressions, and Operands
....................... 96
8.1. Terms and Operators
.................................. 96
8.2.Expressions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97
8.3. Evaluating Assembly-Time Expressions (*)
..................... 98
8.4. Examples
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100
8.5. Machine Instruction Statement Operand Formats
................. 102
8.6. Details of Expression Evaluation (*)
........................ 103
9. Instructions, Mnemonics, and Operands
.......................... 106
9.1. Basic RR-Type Instructions
............................. 106
9.2. Writing RR-Type Instructions
............................ 107
9.3. Basic RX-Type Instructions
............................. 108
9.4. Writing RX-Type Instructions
............................ 108
9.5. Explicit and Implied Addresses
........................... 109
9.6. Typical RS- and SI-Type Instructions
....................... 111
9.7. Writing RS- and SI-Type Instructions
....................... 111
9.8. Typical SS-Type Instructions
............................ 113
9.9. Writing SS-Type Instructions
............................ 113
9.10.Summary
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
10. Establishing and Maintaining Addressability
....................... 116
10.1. The BASR Instruction
............................... 116
10.2. Computing Displacements
............................. 117
10.3. Explicit Base and Displacement
.......................... 119
10.4. The USING Assembler Instruction and Implied Addresses
........... 120
10.5. Location Counter Reference
............................ 121
10.6. Destroying Base Registers
.............................. 122
10.7. Calculating Displacements: the Assembly Process, Pass One
.......... 123
10.8. Calculating Displacements: the Assembly Process, Pass Two
......... 125
10.9. Multiple USING Table Entries
........................... 127
10.10. The DROP Assembler Instruction
........................ 128
10.11. Addressability Errors
................................ 129
10.12. Resolutions With Register Zero (*)
........................ 130
10.13.Summary
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
10.13.1. How the Assembler Helps
.......................... 133 ivAssembler Language Programming for IBM System z? Servers Version 2.00 Chapter IV: Defining Constants and Storage Areas.................... 135
11. Defining Constants
..................................... 136
11.1. Defining Constants
.................................. 137
11.2. DC Instruction Statements and Operands
..................... 138
11.2.1. Blanks in Nominal Values
........................... 138
11.3. Boundary Alignment
................................. 139
11.4. Length Modifiers
................................... 140
11.5. Duplication Factors and Multiple Operands
................... 141
11.6. Multiple Nominal Values
.............................. 142
11.7. Length Attributes
................................... 143
11.8. Decimal Exponents (*)
............................... 143
11.8.1. Decimal Exponents
............................... 143
11.8.2. Exponent Modifiers
.............................. 144
12. Basic Constants
....................................... 146
12.1. F-Type and H-Type Constants
........................... 146
12.2. A-Type Address Constants
............................. 147
12.3. Y-Type Address Constants
............................. 149
12.4. Constants of Types C, X, and B
.......................... 150
12.5. Padding and Truncation
............................... 152
12.6.Literals
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .154
12.7. The LTORG Assembler Instruction
........................ 156
12.8. Type Extensions
................................... 157
13. Data Storage Definition
.................................. 159
13.1. Storage Areas: The DS Assembler Instruction
.................. 159
13.2. Zero Duplication Factor
............................... 160
13.3. The EQU Assembler Instruction
.......................... 162
13.4. EQU Instruction Extended Syntax (*)
....................... 166
13.5. The ORG Assembler Instruction
.......................... 167
13.6. Parameterization
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .169
13.7. Constants Depending on the Location Counter
................. 171
13.8. Assembly Time and Execution Time, Revisited (*)
............... 173
13.9. Summary Observations
............................... 174 Chapter V: Basic Instructions.................................. 177
14. General Register Data Transmission
........................... 178
14.1. Load and Store Instructions
............................ 179
14.2. Multiple Loads and Stores
............................. 180
14.3. Halfword Data
.................................... 182
14.4. Insert and Store Character
............................. 184
14.5. ICM and STCM Instructions
............................ 185
14.6. RR-Type Data Transmission Instructions
.................... 187
14.7. Load, Store, and Insert for 64-bit General Registers
............... 189
14.8. RRE-Type Data Transmission Instructions for 64-bit General Registers
... 192
14.9. The Load and Test Instructions
.......................... 193
14.10. Mixed 32- and 64-bit Operands
.......................... 194
14.11. Other General Register Load Instructions (*)
.................. 195
14.11.1. Load Byte Instructions
............................ 196
14.11.2. Load Logical Character Instructions
.................... 196
14.11.3. Load Logical Halfword Instructions
.................... 197
14.11.4. Load Logical (Word) Instructions
...................... 197
14.11.5. Load Logical Thirty One Bit Instructions
................. 197
14.12. Misunderstandings to Avoid
............................ 198
14.13.Summary
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .199
15. Testing the Condition Code: Conditional Branching
.................. 204
15.1. The Branch Address
................................. 204
15.2. The Branch Mask and Branch Condition
..................... 205
15.3. Examples of Conditional Branch Instructions
.................. 206
15.4. No-Operation Instructions
............................. 206
15.4.1. Special No-Operation Instructions (*)
.................... 206
15.5. Conditional No-Operation
............................. 207
15.6. Extended Mnemonics
................................ 210
15.7. A Comment on Programming Style
........................ 212
Contentsv
15.8. A Design Oversight and a Modern "Correction" (*)............... 212
15.9.Summary
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .213
16. Fixed-Point Binary Addition, Subtraction, and Comparison
............. 216
16.1. Signed-Arithmetic Add and Subtract Instructions
................ 216
16.2. Signed-Arithmetic Operations Using 32-Bit Registers
.............. 217
16.2.1. Condition Code Settings After Arithmetic
.................. 218
16.3. Signed-Arithmetic Operations Using 64-Bit Registers
.............. 221
16.4. Signed-Arithmetic Compare Instructions
..................... 222
16.5. Logical-Arithmetic Add and Subtract Instructions
................ 224
16.6. Add With Carry, Subtract With Borrow (*)
................... 228
16.7. Operations With Mixed 64-Bit and 32-Bit Operands
.............. 229
16.8. Logical-Arithmetic Compare Instructions
..................... 232
16.9. Retrieving and Setting the Program Mask (*)
.................. 234
16.10.Summary
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[PDF] Introduction to Assembler Programming