[PDF] [PDF] The Thumb instruction set - APT - The University of Manchester
t These are similar to ARM instructions except: r offsets are scaled to half-word, not word r range is reduced to fit into 16 bits r BL works in two stages: H=0: LR
t These are similar to ARM instructions except: r offsets are scaled to half-word, not word r range is reduced to fit into 16 bits r BL works in two stages: H=0: LR
For example, a Branch (B in assembly language) becomes BEQ for "Branch if Equal", which means the Branch will only be taken if the Z flag is set In practice,
4 jui 2011 · The additions provide ARM equivalents of instructions supported in the Thumb instruction set The precise effects of each new instruction are
The purpose of this manual is to describe the ARM instruction set architecture, including its high code density Thumb® subset, and three of its standard
Thumb is: • a compressed, 16-bit representation of a subset of the ARM instruction set – primarily to increase code density – also increases performance in
ARMv3 ARM6, ARM7 : 2000 (FPU, jeu d'instruction Thumb 16 bits), Les drapeaux CPSR sont tr`es utilisés dans les architectures ARM : ▷ Il possible pour la
IT Unit - ARM System Design Thumb instruction set - v5 - 3
MANCHEstER
1824
The Universityof Manchester
What is Thumb?
o Thumb is:ma compressed, 16-bit representation of a subset of the ARM instruction set - primarily to increase code density - also increases performance in some cases o It is not a complete architecturemall 'Thumb-aware" cores also support the ARM instruction set - therefore the Thumb architecture need only support common functions
IT Unit - ARM System Design Thumb instruction set - v5 - 4
MANCHEstER
1824
The Universityof Manchester
The Thumb bit
o The 'T" bit in the CPSR controls the interpretation of the instruction streammswitch from ARM to Thumb (and back) by executing BX instruction mexceptions also cause switch to ARM code -return symmetrically to ARM or Thumb code mNote: do not change the T bit with MSR! C V N Z
IT Unit - ARM System Design Thumb instruction set - v5 - 6
MANCHEstER
1824
The Universityof Manchester
The Thumb programmers" model
o Thumb register use:mr0 - r7 are general purpose registers mr13 is used implicitly as a stack pointer -in ARM code this is a software convention mr14 is used as the link register - implicitly, as in the ARM instruction set ma few instructions can access r8 - r15 mthe CPSR flags are set by data processing instructions & control conditional branches
IT Unit - ARM System Design Thumb instruction set - v5 - 7
MANCHEstER
1824
The Universityof Manchester
The Thumb programmers" model
o
Thumb-ARM similarities:mload-store architecture
-with data processing, data transfer and control flow instructions msupport for 8-bit byte, 16-bit half-word and 32-bit data types -half-words are aligned on 2-byte boundaries -words are aligned on 4-byte boundaries m32-bit unsegmented memory
IT Unit - ARM System Design Thumb instruction set - v5 - 8
MANCHEstER
1824
The Universityof Manchester
The Thumb programmers" model
o Thumb-ARM differences:mmost Thumb instructions are unconditional -all ARM instructions are conditional mmost Thumb instructions use a 2-address format -most ARM instructions use a 3-address format mThumb instruction formats are less regular -a result of the denser encoding mThumb has explicit shift opcodes -ARM implements shifts as operand modifiers
[PDF] THUMB Instruction Set