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®MOTOROLA

M6809

EXORciser

User's Guide

M6809EXOR(D1)

MICROSYSTEMS

M6809

EXORciser

USER'S GUIDE

M6809EXOR (Dl}

SEPTEMBER 1979

The information in this document has been carefully checked and is believed to be entirely reliable. However, no res pons i bi 1 ity is assumed for inaccuracies. Furthermore, Motorola reserves the right to make changes to any products herein to improve reliability, function, or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. EXORciser®, EXORdisk, and EXbug are trademarks of Motorola Inc.

First Edition

©Copyright 1979 by Motorola Inc.

TABLE OF CONTENTS

Page

CHAPTER 1 GENERAL INFORMATION

1.1 INTRODUCTION 1-1

1.2 FEATURES 1-1

1.3 SPECIFICATIONS 1-2

1.4 EQUIPMENT SUPPLIED 1-2

1.5 GENERAL DESCRIPTION 1-3

1.5.1 EXORciser Memory Parity 1-3

1.5.2 Dual Map Concepts 1-5

1.5.3 Second level Interrupt Feature 1-7

1.5.4 Dynamic System Bus 1-10

CHAPTER 2 INSTALLATION INSTRUCTIONS AND HARDWARE PREPARATION

2.1 INTRODUCTION 2-1

2.2 UNPACKING INSTRUCTIONS 2-1

2.3 INSPECTION 2-1

2.4 INSTALLATION INSTRUCTIONS 2-1

2.5 DATA TERMINAL SELECTION AND CONNECTIONS 2-2

2.5.1 RS-232C Interconnections 2-2

2.5.2 20mA Current loop Interconnections 2-2

2.6 PREPARATION OF SYSTEM MODULES 2-2

CHAPTER 3 OPERATING INSTRUCTIONS

3.1 INTRODUCTION 3-1

3.2 SWITCHES AND INDICATORS 3-1

3.2.1 Front Panel Switches and Indicators 3-1

3.2.2 Switches on the DEbug Module 3-2

3.3 INITIALIZATION 3-3

3.3.1 Power ON/OFF Procedures 3-3

3.3.2 Baud Rate Selection 3-4

3.3.3 Start-Up Procedures 3-4

3.4 USING THE DUAL MEMORY MAP 3-5

3.5 ADDRESS SELECTION 3-5

3.6 EXbug COMMANDS 3-6

3.6.1 Four-Character Commands 3-8

3.6.2 Single Character Commands 3-14

3.6.2.1 Register Display and Change 3-14

3.6.2.2 Program Execution Control 3-16

3.6.2.3 Program Execution 3-19

3.6.2.4 Memory Parity Control 3-20

3.6.2.5 I/0 Control 3-22

3.6.2.6 Memory Search 3-23

3.6.2.7 Miscellaneous 3-26

3.6.3 Memory Change 3-27

3.6.3.1 Adding EXbug Commands 3-28

3.7 EXbug SUBROUTINES AND ENTRY POINTS 3-29

CHAPTER 4 SYSTEM DEVELOPMENT USING EXORciser

4.1 INTRODUCTION 4-1

4.2 THE EXORciser IN SYSTEM DEVELOPMENT 4-1

4.3 PERIPHERAL INTERFACING 4-1

4.4 PROCEDURE FOR DESIGN 4-3

4.5 EXORciser CONFIGURATION 4-5

4.6 SYSTEM ADDRESS SELECTION 4-5

4.7 SECOND LEVEL INTERRUPT 4-5

i

CHAPTER 4 {cont'd)

4.8 MEMORY ASSIGNMENTS

4.9 EXORciser CONFIGURATION FOR SYSTEM EMULATION

4.10 TESTING PROTOTYPE OR PRODUCTION SYSTEMS

4.11 PRECAUTIONS WHEN USING THE USER SYSTEM EVALUATOR

4.12 SYSTEM EVALUATION AND DEBUG PROCEDURES

4.12.1 Memory Loader

4.12.2 Abort Function

4.12.3 Default Debug Offset

4.12.4 Memory Change Function

4.12.5 Breakpoint, Trace, and Halt-on-Address/

4.12.5.1

4.12.5.2

4.12.5.3

4.12.5.4

4.12.6

4.13

CHAPTER 5

5.1 5.2

APPENDIX A

APPENDIX B

APPENDIX C

APPENDIX D

APPENDIX E

APPENDIX F

APPENDIX G

APPENDIX H

APPENDIX I

FIGURE 1-1.

1-2. 1-3. 1-4. 3-1. 3-2. 3-3. 3-4. 3-5. 3-6. 3-7. 3-8. 3-9. 4-1. 4-2. 4-3. 5-1.

Scope Sync Functions

Breakpoints

Trace

Halt-on-Address

Scope Sync

Error Correction

SOFTWARE DEVELOPMENT USING EXORciser

THEORY OF OPERATION

INTRODUCTION

BASIC EXORciser BLOCK DIAGRAM DESCRIPTION

EXORciser BUS DESCRIPTION AND SPECIFICATIONS

EXbug 2.1 PROGRAM FOR EXORciser

PERIPHERAL REQUIREMENTS FOR EXORciser OPERATION

USE OF THE ASR33 TELETYPEWRITER WITH EXORciser

THE RS-232C STANDARD

TI TERMINAL DESCRIPTION

EXECUTIVE MAP --USER MAP INTERFACE

COMPATIBILITY AMONG M6809 EXORciser, EXORciser II, and

M6800 EXORciser I MODULES

DIRECT MEMORY ACCESS ON THE DEVELOPMENT SYSTEM BUS

LIST OF ILLUSTRATIONS

EXORciser Simplified Block Diagram

EXORciser Dual Memory Map

Interrupt Vectors in User Map

Interrupt Vectors for Executive Map and Single Map Mode

EXORciser Front Panel Switches and Indicators

Toggle Switches on DEbug Module

PRNT Example

Tape Format

PNCH Example

LOAD Example

VERF Example

SRCH Example

MOOS Line Printer Driver

System Designing and Verifying Procedure

EXORciser, the Development Tool

Using Memory Change to Calculate a Relocatable Address

EXORciser Simplified Block Diagram

ii Page 4-6 4-6 4-7 4-9 4-9 4-9 4-9 4-9 4-10 4-10 4-11 4-11 4-11 4-12 4-12 4-12 5-1 5-1 A-1 B-1 C-1 D-1 E-1 F-1 G-1 H-1 I-1 1-4 1-6 1-7 1-8 3-1 3-2 3-9 3-10 3-11 3-12 3-13 3-13 3-24 4-2 4-4 4-10 5-3

TABLE 1-1.

1-2. 1-3. 1-4. 1-5. 3-1. 3-2. 3-3.

LIST OF TABLES

EXORciser Specifications

Second Level Interrupt Rules

Second Level NMI Rules

Second Level SWI Rules

IRQ, FIRQ, SWI2, and SWI3 Rules

EXbug Commands

Dual Map Mode Second Level SWI Options

EXbug Routines

1-2 1-9 1-9 1-10 1-10 3-6 3-25quotesdbs_dbs6.pdfusesText_11