Design compiler save session

Mar 22, 2018Yes, it is possible to save and/or load Design Compiler database at different stages of synthesis. Synopsys has DDC format to carry both  Is there any reason why the Design Compiler does not optimize a How to find power, delay, and area of a synthesized design using More results from electronics.stackexchange.com
Mar 22, 2018Yes, it is possible to save and/or load Design Compiler database at different stages of synthesis. Synopsys has DDC format to carry both 

How do I save a physical constraint in design compiler?

The imported physical constraints are automatically saved to your .ddc file.
To save the physical constraints in a separate file, use the write_floorplancommand after extraction.
The command saves the floorplan information so you can read the floorplan back into Design Compiler.


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