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www.ti.com www.ti.com www.ti.com www.ti.com www.ti.com www.ti.com www.ti.com {printf("helloworld\n");}B,bSuffix - binaryintegerH,hSuffix - hexadecimalintegerLSBLeastsignificantbitMSBMostsignificantbit0xPrefix - hexadecimalintegerQ,qSuffix - octalinteger
RelatedDocumentationFromTexasInstrumentswww.ti.com12SPRUI03B-May2017SubmitDocumentationFeedbackCopyright©2017,TexasInstrumentsIncorporatedReadThisFirstRelatedDocumentationFromTexasInstrumentsSeethefollowingresourcesforfurtherinformationabouttheTICodeGenerationTools:•TexasInstrumentsWiki:Compilertopics•TexasInstrumentsE2ECommunity:CompilerforumYoucanusethefollowingbookstosupplementthisuser'sguide:SPRUI04 - TMS320C6000OptimizingC/C++CompilerUser'sGuide.DescribestheTMS320C6000C/C++compilerandtheassemblyoptimizer.ThisC/C++compileracceptsANSIstandardC/C++sourcecodeandproducesassemblylanguagesourcecodeforthefortheC64+,C6740,andC6600variantsoftheTMS320C6000platformofdevices.RefertoSPRU187whenusinglegacyC6200,C6400,C6700,andC6700+devices.Theassemblyoptimizerhelpsyouoptimizeyourassemblycode.SPRAB89 - C6000EmbeddedApplicationBinaryInterface.ProvidesaspecificationfortheELF-basedEmbeddedApplicationBinaryInterface(EABI)fortheC6000familyofprocessorsfromTexasInstruments.TheEABIdefinesthelow-levelinterfacebetweenprograms,programcomponents,andtheexecutionenvironment,includingtheoperatingsystemifoneispresent.SPRU190 - TMS320C6000DSPPeripheralsOverviewReferenceGuide.ProvidesanoverviewandbrieflydescribestheperipheralsavailableontheTMS320C6000familyofdigitalsignalprocessors(DSPs).
SPRU732 - TMS320C64x/C64x+DSPCPUandInstructionSetReferenceGuide.DescribestheCPUarchitecture,pipeline,instructionset,andinterruptsfortheTMS320C64xandTMS320C64x+digitalsignalprocessors(DSPs)oftheTMS320C6000DSPfamily.TheC64x/C64x+DSPgenerationcomprisesfixed-pointdevicesintheC6000DSPplatform.TheC64x+DSPisanenhancementoftheC64xDSPwithaddedfunctionalityandanexpandedinstructionset.SPRUGH7 - TMS320C66xCPUandInstructionSetReferenceGuide.DescribestheCPUarchitecture,pipeline,instructionset,andinterruptsfortheTMS320C66xdigitalsignalprocessors(DSPs)oftheTMS320C6000DSPplatform.TheC66xDSPgenerationcomprisesfloating-pointdevicesintheC6000DSPplatform.SPRUFE8 - TMS320C674xCPUandInstructionSetReferenceGuide.DescribestheCPUarchitecture,pipeline,instructionset,andinterruptsfortheTMS320C674xdigitalsignalprocessors(DSPs)oftheTMS320C6000DSPplatform.TheC674xisafloating-pointDSPthatcombinestheTMS320C67x+™DSPandtheTMS320C64x+™DSPinstructionsetarchitecturesintoonecore.Trademarks
Object file
.bss .data .text RAMEEPROM
ROMTarget memory
.data4 00000000 .data
5 00000000 00000011 coeff .word 011h,022h
00000004 00000022
9 00000000 .bss var1,4
10 00000004 .bss buffer,40
14 00000008 00001234 ptr .word 01234h
18 00000000 .text
19 00000000 00800528 sum: MVK 10,A1
20 00000004 021085E0 ZERO A4
2122 00000008 01003664 aloop: LDW *A0++,A2
23 0000000c 00004000 NOP 3
24 00000010 0087E1A0 SUB A1,1,A1
25 00000014 021041E0 ADD A2,A4,A4
26 00000018 80000112 [A1] B aloop
27 0000001c 00008000 NOP 5
2829 00000020 0200007C- STW A4, *+B14(var1)
33 0000000c .data
34 0000000c 000000AA ivals .word 0aah, 0bbh, 0cch
00000010 000000BB
00000014 000000CC
38 00000000 var2 .usect !newvars!,4
39 00000004 inbuf .usect !newvars!,4
43 00000024 .text
44 00000024 01003664 xmult: LDW *A0++,A2
45 00000028 00006000 NOP 4
46 0000002c 020C4480 MPYHL A2,A3,A4
47 00000030 02800028- MVKL var2,A5
48 00000034 02800068- MVKH var2,A5
49 00000038 02140274 STW A4,*A5
53 00000000 .sect !vectors!
54 00000000 00000012" B sum
55 00000004 00008000 NOP 5
Field 2Field 1 Field 3Field 4
.bssreserves44bytesinmemory.Line numbers Object code
.text .data .bssSection00800528
021085E0
01003664
00000011
00000022
00001234
000000AA
000000BB
No data!
44 bytes
reserved19 20 225 5 14 34
34
923
2400004000
0087E1A0
vectors00000000"00000024"54 54newvarsNo data!
8 bytes
reserved38 392526
27
29
44
45
46
47
48
49021041E080000112
000080000200007C-
01003664
00006000
020C4480
02800028-
02800068-
02140274
34 000000CC
100180082AMVKLYbecomes01B9082A
0180006AMVKHYbecomes1860006A
Initialization
tables (EXT_MEM) .bss section (D_MEM) Boot routine .cinit sectionLoaderObject file Memory
cint .bss .cinitLoaderObject file Memory
Windows:c:\tools\files\copy.asm
||Inst1 Inst2 Inst3 Inst4 Inst5 Inst6 Inst7These five instructions run
in parallel with the first instruction. 3.14 3. -0.314e13 +314.59e-2 $strtod("0x1.234p-5") $strtod("NaN") $strtod("Inf") nop mymac.macromylab?nopBmylab?nop5.endm mymac .sect"Sect_One"nop mylab?.word0nop nop .newblock mylab?.word0nop nop .byteSYM2*SYM2;Unequalvalues.endif .byteSYM1;Greaterthan.endif .byteSYM4+SYM4;Equalvalues.endifA3:A2B3:B2
A5:A4B5:B4
A7:A6B7:B6
A9:A8B9:B8
A11:A10B11:B10
A13:A12B13:B12
A15:A14B15:B14
A17:A16B17:B16
A19:A18B19:B18
A21:A20B21:B20
A23:A22B23:B22
A25:A24B25:B24
A27:A26B27:B26
A29:A30B29:B30
A31:A32B31:B32
A7:A6:A5:A4A7::A4B7:B6:B5:B4B7::B4
A11:A10:A9:A8A11::A8B11:B10:B9:B8B11::B8
ADDsrc2,dst,dst.endm
(1)OperatorDescription (2)1+ %MultiplicationDivision
Modulo
3+ -AdditionSubtraction
4<<>>ShiftleftShiftright5<
awell-definedexpression*+B14/B15[14]... make_pcr_call: myfunc: ... ... ... ... ... ... ... ... ... number 2 ** Global variables
4 00000000 .bss var1, 4
5 00000004 .bss var2, 4
6 8 ** Include multiply macro
10 .copy mpy32.inc
A 1 mpy32 .macro A,B
A 2
A 5
A 7
A 9
A 11
A 13 .endm
11 15 00000000 .text
16 00000000 _func
17 00000000 0200006C- LDW *+B14(var1),A4
18 00000004 0000016E- LDW *+B14(var2),B0
19 00000008 00006000 NOP 4
20 0000000c mpy32 A4,B0
1 1 1 1 1 21 00000024 000C6362 B B3
22 00000028 00008000 NOP 5
23 * end _func
Include file
letterLine numberNesting level Field 1 Field 2 Field 3 Field 4
intm1;intm2;}X;Xsvar={1,2};Example4 .text topic 17 bytes
reserved 20 bytes
reservedRes_1 = 08h Res_2 = 33h
.break .emsg.eval .fclist .fcnolist.length .mlist .mmsg.mnolist .sslist .ssnolist.var .width .wmsg (sourcefile)byte.asm (firstcopyfile)word.asm (sourcefile)byte2.asm (firstcopyfile)word2.asm S E E E E E E E E E E E M M M M M M M M M M M M M M M M M M M M 31 200
M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M 0 31
Legend:S = signE = exponent (11-bit biased)
M = mantissa (52-bit fraction)
.drnolist 8.drnolist12.loop313.evalx+1,x14.endloop
.word0 MVKparm1,A1.endif
.endm MSG_EXPARAMMSG_EX
MVK0,A0.endif
MVK0,A0.endif
S E E E E E E E E M M M M M M M M M M M M M M M M M M M M M M M 31230
Legend:S = sign (1 bit)
E = exponent (8-bit biased)
M = mantissa (23-bit fraction)value = (-1)
Sx (1.0 + mantissa) x (2)exponent-127
.length55.width100 .space0CCh.text ABSA0,A1.nolist
table:.data.word-1.byte0FFh.list .text MVA0,A1.data
13 Becomesthisassemblycodeoutput:fn:
13.newblock;undefine$114
NOP4ADDA4,A5,A6ADDB4,B5,B6NOP
.sect"two"ADDA4,A5,A6NOP NOP 5000000000c66SPLOOP16
13000000108c6eNOP514
17000000120c66SPLOOP118
25000000288c6eNOP526
27.remark500128
370000004000008000NOP5
_int_func1: NOP NOP .tab4NOP NOP NOP .tab16NOP NOP NOP 2 bytes
100 bytes
50 bytes
array ptr dflagSection var1 152 bytes reserved
in var1100 bytes ptrSection var2 100 bytes reserved
in var2 1,parameter
.endm pushxA0,A1,A2,A3 .endm .globalportbaseforce PORT0.set0PORT1.set4.
PORT7.set28
.emsg"BadMacroParameter".endif .endm storex10hstorexA15 .else .evalI+1,i.endif .endloop .endm add3add3.asm Example6
.evalx+1,x.endloop Example6
ADDsrc2,sum,sum.else
ADDsrc2,sum,sum.endif
.endm MACK3A0,A1,A3,0MACK3A0,A1,A3,100
11 1200000000MINA0,A1,A21
!Thefirstlinetestsforproperinput.! .else .endif .if .endif .endm .endm 16.UsingRecursiveMacros.fcnolist
.endm .endm Table6-2.CreatingMacrosSee
.endmEndmacrodefinitionSection6.2.endm Table6-4.ConditionalAssemblySee
Table6-6.FormattingtheListingSee
;Specifylibraryname:modules.lib bss.asm data.asm text.asm sect.asm clink.asm copy.asm double.asm drnolist.asm emsg.asm end.asm --cinit_compression entryEntrypointOn load_addrDisplayloadaddressesOff memoryMemoryrangesOn modulesModuleviewOn sectionsSectionsOn sym_defsDefinedsymbolsperfileOff sym_dpSymbolssortedbydatapageOn sym_nameSymbolssortedbynameOn sym_runaddrSymbolssortedbyrunaddressOn --mapfile_contents=all,nocopytables --mapfile_contents=none,entry -[f2.c]-#include"header.h"... --symbol_map='foo=foo_patch' callfoo;callthefunction"foo"... MEMORY/*MEMORYdirective*/{
SECTIONS/*SECTIONSdirective*/{
ALGORITHMFILLLOAD_ENDPAGETABLE
ALIGNGROUPLOAD_SIZEPALIGNTYPE
BLOCKHIGHMEMORYRUNUNORDERED
COPYINPUT_RANGENOINITRUN_SIZE
DSECTl(lowercaseL)NOLOADRUN_START
ECCLENoSECTIONS
ENDLENGTHORGSIZE
FormatDecimalOctalHexadecimal
Assemblerformat3240q020h
Cformat320400x20
MEMORY
type=DSECTor .const .data:alpha.vectors FAST_MEM
.bssSLOW_MEM .data:beta .textEXT_MEM 0x00000000
0x00001000
0x00001800
0x10000000
0x10001000
0xFFFFFFFF- Bound at 0x00000000- Allocated in FAST_MEM- Allocated in SLOW_MEM- Aligned on 16-byte
boundary - Aligned on 16-byte boundary - Empty range of memory as defined in above - Allocated in EXT_MEM - Empty range of memory as defined in aboveThe section is composed of the .intvec1 section from t1.obj and the .intvec2 section fromquotesdbs_dbs46.pdfusesText_46
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