[PDF] Architecture of the Super NES SNES: 16-bit Gaming Console. ?

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Architecture of the

Super NES

Jacob Klassen & Thomas Papish

żComputer with interchangeable ROM for

game data

żProcesses read-in game data alongside

controller inputs to output video and audio

Genesis

Overview - Super Nintendo Entertainment System

Three Main Processing Units:

żSplit into PPU1 & PPU2

Central Processing Unit: Ricoh 5A22

ż1 word per instruction: 1-byte opcode, 0-3 byte operand

Central Processing Unit: Bus Connections

Blue: 24

bit CPU Address "A" Bus

Pink: 8-bit CPU Address "B" Bus

Yellow: 8

bit CPU Data Bus

Picture Processing Unit

ż512 x 224 and 521 x 476 also possible through interlaced graphics żModes use different combinations of backgrounds and palettes żCertain modes are dedicated to scrolling, scaling, and rotation

Picture Processing Unit - Example of Mode 1

Mode 1 uses:

General Priority:

Normal View

Picture Processing Unit - Example of Mode 1

BG1 BG2 BG3 Sprites

Audio Processing Unit

Audio Processing Unit

Processor

sometimes with the game cartridge

Game Pak

żBattery-backed SRAM for saving the game's state żAdditional RAM to supplement the console's native RAM żEnhancement chips to operate in-parallel with the native processors żData transfer speed between the console and the cartridge żCurrent limit of the console to supply power to the cartridge

Game Pak - Enhancement Chips

Design Philosophy: Allow cartridges to interface supporting hardware rather relying solely on an expensive CPU that would become obsolete in a few years Game Pak with DSP-1 Game Pak with SA-1 Game Pak with Super FX

Enhancement Chips: Super FX

Enhancement Chips: DSP-1

transformations scaling, and rotation

Enhancement Chips: Super Accelerator 1 (SA1)

ż10.74 MHz clock speed

żFaster RAM and 2kB of internal RAM

żMemory-mapping capabilities

żBitmap to bitplane transfer

żPPU-synched hardware timers

Controllers

on the controller

żThree tracking speeds

Use of SNES Architecture (2000's and beyond)

simulate the behavior of the console żSome designed for accuracy, while others designed for modern performance żUsed modern hardware to mimic the behavior of the SNES żNo cartridges; stored game data on internal memory żCame with additional features such as save-states on-command żSeveral online documents preserved 15+ years after its lifespan for hardware modifications, software development using the 65c186 ISA, or simulated recreations of the architecture (Arduino & other microprocessors, FPGAs, etc.)

References

quotesdbs_dbs4.pdfusesText_8

[PDF] 65c02 assembler

[PDF] 65c02 digikey

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[PDF] 65c02 pinout

[PDF] 65c02 processor

[PDF] 65c22 datasheet

[PDF] 65c816 assembly language

[PDF] 65c816 cmp

[PDF] 65c816 computer

[PDF] 65c816 opcodes

[PDF] 65c816 sbc

[PDF] 65c816 vs 6502

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