[PDF] 6809 Instruction Set Instruction Mnemonic Addressing Mode





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DEFT Macro/6809 Assembly Language - 1 Introduction

Readers are expected to already be familiar with the 6809 instruction set registers and addressing modes. Background. 1. AsmLang. Page 4. AsmLang.

6809 Instruction Set

Instruction

MnemonicAddressing Mode

Description

CC bit

ImmediateDirect

IndexedExtended

Inherent53210

Op~# Op~ #Op~#Op~#Op~#HNZVC ABX 3A3

1X = B+X (Unsigned)

ADC

ADCA89229942A94+

2+B953 A = A+M+C

ADCBC922D9

42E94+2+

F953

B = B+M+C

ADD

ADDA8B22

9B42AB4+2+BB5

3 A = A+M+++++

ADDBCB2

2 DB42

EB4+2+FB5 3 B = B+M+++++

ADDDC343D3

62E36+2+

F373

D = D+M:M+1 +++

+AND

ANDA842 2 94

42A4 4+ 2+ B4 5

3 A = A && M

0

ANDBC422D442E4

4+2+F453 B = B && M ++0

ANDCC1C

32

C = CC && IMM?????

ASLASLA 4821

Arithmetic

shift left 8++++ ASLB 5821
8++ ASL 086

2686+2+7873

8++++ ASR ASRA 472

1Arithmetic

shift right 8+

ASRB 57218++ +

ASR 07

62676+2+7773 8++ +

BIT

BITA852295

42A54+2+

B55 3

Bit Test A (M&&A)

++0

BITBC52

2D542E54+2+F553 Bit Test B (M&&B)

++0 CLR CLRA

4F21A = 0

01 00 CLRB 5F

21B = 0 010

0CLR 0F62

6F6+2+7F73 M = 0 0

100
CMP

CMPA81

229142A1 4+ 2+ B1 5 3 Compare M from A8++++

CMPBC1 2 2 D1 42E1 4+ 2+

F1 5 3

Compare M from B8++

CMPD 10 83

5 4 10

93
7310
A3

7+ 3+ 10

B3 8 4

Compare M:M+1

from D CMPS 11 8C

5 4 11

9C 7311
AC 7+ 3+ 11 BC 8 4

Compare M:M+1

from S +CMPU11 83
5 4 11

93 7311

A3 7+ 3+ 11 B3 8 4

Compare M:M+1

from U

CMPX8C

4 3 9C 62AC

6+ 2+ BC 7 3

Compare M:M+1from X

CMPY 10 8C

5 4 10

9C 73
10 AC

7+ 3+ 10

BC 8 4

Compare M:M+1

from Y COM

COMA 4321A = complement(A) ++01

COMB 532

1B = complement(B)

++01

COM 0362636+2+7373 M = complement(M)

+01

CWAI 3C

20 2

CC = CC ^ IMM;

Wait for Interrupt

7 DAA

19 21Decimal Adjust A

++0+ DEC DECA

4A21A = A 1 +++

DECB 5A21B = B 1 +++

DEC 0A626A6+2+7A73 M = M 1 +++

6809 Instruction Sethttp://ironbark.bendigo.latrobe.edu.au/staff/mal/6809.htm

EOR

EORA882298

42A8

4+2+B85 3 A = A XOR M ++0

EORBC822D842E84+

2+F853 B = M XOR B

++0

EXGR1,R21E 82

exchange R1,R2 INC INCA

4C21A = A + 1 +++

INCB 5C21B = B + 1 ++

INC 0C62

6C6+2+7C73 M = M + 1

JMP 0E326E3+2+7E43 pc = EA

JSR

9D72AD7+2+BD

83 jump to subroutine

6809 Instruction Set

InstructionMnemonic

Addressing Mode

Description

CC bit

ImmediateDirectIndexed

ExtendedInherent53

210
Op~#

Op~#Op~#Op~

#Op ~#HNZV CLD

LDA8622964 2A6 4+ 2+ B6 5 3

A = M ++0

LDBC6 2 2 D6 4 2E6 4+ 2+ F6 5 3 B = M +

+0 LDDCC

3 3 DC 5 2EC5+ 2+ FC6 3 D = M:M+1 ++

0 LDS 10

CE4 4 10

DE6 310

EE

6+ 3+ 10

FE 7

4 S = M:M+1 ++

0 LDUCE3 3 DE5 2EE 5+ 2+ FE 6 3 U = M:M+1 ++0

LDX8E3

3 9E 5 2AE 5+ 2+ BE 6 3 X = M:M+1 ++0

LDY 10 8E

4 4 10

9E 6 310 AE 6+ 3+ 10 BE 7 4

Y = M:M+1 ++0

LEA

LEAS 324+2+

S = EA

LEAU 334+

2+ U = EA

LEAX 304+2+ X = EA

LEAY

314+2+ Y = EA +

LSL LSLA 48
21

Logical

shiftleft LSLB

5821 ++++

LSL 0862686+2+7873

LSR LSRA 4421

Logical

shift right 0+ +

LSRB 5421

0+ + LSR

0462646+2+74

73 0+ +

MUL 3D111

D = A*B

(Unsigned) + 9

NEGNEGA 4021A = !A + 18++

++NEGB 50

21B = !B + 18++

NEG 0062

606+2+

7073 M = !M + 1

8+++ +NOP 12

21No Operation

OR

ORA8A2 2 9A 4 2AA 4+ 2+ BA 5 3 A = A || M ++0

ORBCA22DA42

EA4+2+

FA53 B = B || M

0 ORCC 1A32

C = CC || IMM?????

PSH PSHS

34 5+2

Push Registers onS Stack

PSHU 36
5+2

Push Registers on

U Stack

6809 Instruction Set

PUL PULS

35 5+2

Pull Registers

from S Stack PULU 375+2

Pull Registers

from U Stack ROL

ROLA 4921

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