From a logic diagram, Boolean expressions are written and then transferred into tabular form An example of an asynchronous sequential circuit is shown below :
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[PDF] Asynchronous Sequential Circuits
Asynchronous sequential circuits have state that is not synchronized with a clock Like the synchronous sequential circuits we have studied up to this point they are realized by adding state feedback to combinational logic that imple- ments a next-state function
[PDF] Chapter 9 Asynchronous Sequential Logic Outline
Asynchronous Sequential Circuits ▫ Analysis Procedure ▫ Circuits with Latches ▫ Design Procedure ▫ Reduction of State and Flow Tables ▫ Race- Free
Appendix 1 Asynchronous Sequential Logic Design
A block diagram of a sequential circuit or machine is shown in figure Al l Inputs = == Combinational I==:> Outputs Logic Memory Internal States ~-
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gates and summarize their delays to a single block with delay Δ Asynchronous sequential circuit: SR-latch with NOR gates IE1204 Digital Design, Autumn2016
[PDF] Asynchronous Sequential Circuits
From a logic diagram, Boolean expressions are written and then transferred into tabular form An example of an asynchronous sequential circuit is shown below :
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asynchronous circuits and brie y explain some asynchronous design ments, instead of in latches or ip- ops, as synchronous sequential circuits do The design
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1
Asynchronous Sequential
Circuits
Asynchronous sequential circuits:
Do not use clock pulses. The change of
internal state occurs when there is a change in the input variable.Their memory elements are either unclocked
flip-flops or time-delay elements.They often resemble combinational circuits
with feedback.Their synthesis is much more difficult than the
synthesis of clocked synchronous sequential circuits.They are used when speed of operation is
important.The communication of two units, with each unit
having its own independent clock, must be done with asynchronous circuits.The general structure of an asynchronous
sequential circuit is as follows: 2There are ninput variables, moutput variables,
and kinternal states.The presentstate variables (y
1 to y k ) are called secondary variables. The nextstate variables (Y1 to Y k ) are called excitationvariables.Fundamental-modeoperation assumes that the
input signals change one at a time and only when the circuit is in a stable condition.3The analysis of asynchronous sequential circuits
proceeds in much the same way as that of clocked synchronous sequential circuits. From a logic diagram, Boolean expressions are written and then transferred into tabular form.1.1 Transition Table
An example of an asynchronous sequential circuit
is shown below: Y 1 and Y2 ) as outputs and the secondary variables (y 1 and y 2 ) as inputs.The Boolean expressions are:
212211
yxyxYyxxyY +=1. Analysis Procedure 4The next step is to plot the Y
1 and Y 2 functions in a map: transition tableis obtained:Y= Y 1 Y 2 inside each square. Those entries where Y= yare circled to indicate a stable condition. 5The circuit has four stable total states -y
1 y 2 x=000, 011, 110, and 101 -and four unstable total
states - 001, 010, 111, and 100.The state tableof the circuit is shown below:
1.2 Flow Table
In a flow tablethe states are named by letter
symbols. Examples of flow tables are as follows: 6 In order to obtain the circuit described by a flow table, it is necessary to assign to each state a distinct value.This assignment converts the flow table into a
transition table. This is shown below: 71.3 Race Conditions
A racecondition exists in an asynchronous circuit
when two or more binary state variables change value in response to a change in an input variable.When unequal delays are encountered, a race
condition may cause the state variable to change in an unpredictable manner. If the final stable state that the circuit reaches does not depend on the order in which the state variables change, the race is called a noncritical race. Examples of noncritical races are illustrated in the transition tables below: 8 The transition tables below illustrate critical races: uniquesequence of intermediate unstable states. When a circuit does that, it is said to have a cycle. Examples of cycles are: 91.4 Stability Considerations
An asynchronous sequential circuit may become
unstable and oscillatebetween unstable states because of the presence of feedback. The instability condition can be detected from the transition table. Consider the following circuit:2212121
and the transition table for the circuit is:Ythat are equal to yare circled
and represent stable states. When the input x 1 x 2 is11, the state variable alternates between 0 and 1
indefinitely. 10The SRlatch is used as a time-delay element in
asynchronous sequential circuits. The NOR gateSRlatch and its truth table are:
2. Circuits with SRLatches
The feedback is more visible when the circuit is
redrawn as: and the transition table for the circuit is: 11The behaviour of the SRlatch can be investigated
from the transition table.The condition to be avoided is that both S and R
inputs must not be 1 simultaneously. This condition is avoided when SR= 0 (i.e., ANDing of Sand R must always result in 0).When SR= 0 holds at all times, the excitation
function derived previously: yRRSY′+′= can be expressed as: yRSY′+= 12The NAND gate SRlatch and its truth table are:
S and Rnot be 0 simultaneously which is satisfiedThe excitation function for the circuit is:
RySRySY+′=′′=])([
132.1 Analysis Example
Consider the following circuit:
Sand Rinputs in each latch:
122211212211
yxRxxRxxSyxSThe next step is to check if SR= 0 is satisfied:
00122122212111
yxxxRSxxyxRSThe result is 0 because x
1 1 = x 2 2 = 0 14 The next step is to derive the transition table of the circuit. The excitation functions are derived from Y= Y 1 Y 2 is developed: Investigation of the transition table reveals that the circuit is stable. There is a critical race condition when the circuit is initially in total state y 1 y 2 x 1 x 2 = 1101 and x 2 changes from 1 to 0. If Y 1 changes to 0 before Y 2 the circuit goes to total state 0100 instead of 0000.212221212212222
)(yyyxxxyyxxxyRSY121121121211111
)(yxyxyxyxxyxyRSY 152.2 SRLatch Excitation Table
Lists the required inputs Sand Rfor each of the
possible transitions from the secondary variable y to the excitation variable Y.Consider the following transition table:
2.3 Implementation ExampleUseful for obtaining the Boolean functions for S
and Rand the circuit's logic diagram from a given transition table.SRlatch excitation table, we can obtain
maps for the Sand Rinputs of the latch: yxxxY 12116
Xrepresents a don't carecondition.
The maps are then used to derive the simplified
Boolean functions:
121xRxxS′=′=