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Instruction Encoding

Thorne : Chapter 13 2 Appendix V B

Thorne

Chapter

13 2

Appendix

V B • Additional notes in : Instruction Encodin g Note g

SYSC3006 1

Instruction EncodingInstruction

Encoding

On the Intel 8086, an instruction is a sequenceof 1..6 bytes• A simple (and incomplete) model of an instruction is as follows

Opcode

Operand

Operand

Operand

Operand

Operand

Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6

Opcode

Destination Operand, if neededSource if needed

Operand

Operand

Operand

Operand

Operand

Tells what kind of iii

nstruct i on,

How many bytes...

SYSC3006 2

Number of Bytes Depends on ...

Number of

Operands

Number

of Bytes

Depends

on

Number

of

Operands

NOP

1001 0000

INC BX (Thorne, p 668)

0100 0001

ADD BX, 1(Thorne, p 667) ...

1000 0011

1100 0011

0000 0001

0000 0000

Immediate value: a word (little endian)

SYSC3006 3

Number of Bytes Depends on ...

Addressing Modes

Number

of Bytes

Depends

on

Addressing

Modes

ADD BX, AX

00000001

11000011BX | AX

ADD BX, 1

10000001

11000011

00000001Register Immediate

00000000

ADD BL, 1

00000001Register

10000000

11000011Immediate

ADD BX, [1]

00000011

00011110Direct

00000001

00000000

Direct

Registe

r

Register

ADD BL, [1]

00000001

00000000

00000010

00011110

Direct

Register

SYSC3006 4

Review Earlier Slides on Addressing ModesReview

Earlier

Slides

on

Addressing

Modes

1) Register mode: operand is a register2)

Immediate mode

: operand is a constant 2)

Immediate

mode operand is a constant - Constant value is encoding as part of instruction • value is hard-coded (static)

CttlildditIRdi

fth C ons t an t va l ue i s l oa d e d i n t o IR d ur i n g f e t c h - Constant value obtained from IR during execution

3) Direct memory mode: operand is address offset of memory

variable - Constant address offsetis encoded as part of instruction • Address offset is har d -coded static althou g h contents () g of address may be dynamic • During execution, the address offset is implicitly combined with DS

SYSC3006 5

Number of Bytes Depends on ... Addressing Modes

Indirect Addressing Modes

Number

of Bytes

Depends

on

Addressing

Modes

Indirect

Immediate

Assume : WORD PTR

ADD [BX], 1

10000001

00000111

00000001

Indirect

Immediate

Based

00000000

Constant

Immediate

ADD [BX+2], 1

00000010

Based

10000001

01000111

Constant

00000001

00000000

Base Index

Immediate

ADD [BX+SI], 1

Base Index

10000001

00000000

00000001

00000000

ADD [BX+SI+2], 1

00000010

10000001

01000000

Constant

00000001

Immediate

00000000

Base-Index with

SYSC3006 6

00000010

10000001

01000000

00000001

00000000

Review Earlier Slides on Addressing Modes

1) Indirect: Operand is an address offsetheld in a register

2) Based or Indexed Indirect: Operand is an address offset

held in a register and a constant offset [BX+2][BX] held in a register and a constant offset •During fetch, constantoffset is read in as part of instruction•

During execution

CPU uses temporary register to

During

execution CPU uses temporary register to calculate BX + constant • It then accesses memory addressed by BX + constant 3) B Id

Odiddffthldit it

[BX SI] 3) B ase- I n d ex: O peran d i s an a dd ress o ff se t h e ld i n t wo re gi s t e r -During execution, CPU calculates sum of 2 registers - It then accesses memory addressed by sum [BX SI]

4) Base-Index with Displacement: Like based-indexed mode,

except includes a constant too Durin g execution

CPU calculates sum of 3 values

[BX+SI+2]

SYSC3006 7

g - It then accesses memory addressed by sum

Instruction Encoding : J

Instruction

Encoding

J • On all jump instructions, the targetmust supply a value that will be used to modify the IP 1

Absolute addressing

(Assembly code) : The instruction 1quotesdbs_dbs12.pdfusesText_18
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