Design compiler timing loop detected

  • What is a timing loop?

    Loop Timing.
    Loop timing refers to how long a loop takes to execute a single iteration.
    The amount and type of code a loop contains affects its execution speed.
    By default, each loop iteration executes as quickly as possible based on the code inside the loop..

  • Combinational loops are logical structures that contain no synchronous feedback element.
    This kind of loops cause stability and reliability problemas, as we will see in this article, violating the synchronous principles by making feedback with no register in the loop.
A timing loop occurs when there is a combination feedback in a design. See the below circuit for reference. If timing loops are there in a design, we need to break that ideally in the RTL itself. Otherwise the tool will take up more time in analysis for breaking the loop.

How do I view all timing loops in a design?

Use report_timing -loops to view all timing loops in your design.
Use to manualy break the loops. %s on cell %s%s combinational feedback loops.
It is not displayed for arcs that are manually disabled with the disable_timing command.
So it definately looks like there is a combinational feedback loop.
Since the loop is occuring.

What is a combinatorial timing loop?

"Combinatorial timing loops:

  • These loops are created when output of combinatorial logic or gate is fed back to its input making a timing loop.
    This kind of loops unnecessary increase the number of cycles by infinitely going around the circle in the same path.
    These loops also cause a problem in testability." Not open for further replies.
  • Why is the timing loop not simulated?

    It simulated just fine, because in the "real world" other signals were such that the conditions necessary for the timing loop never actually occurred because of those other signals.
    So that is one reason why it might not be caught during simulation.
    Even at that, only two of those were blocking generating a bitstream.

    Design compiler timing loop detected
    Design compiler timing loop detected
    Transponder timing is a technique for measuring performance in sport events.
    A transponder working on a radio-frequency identification (RFID) basis is attached to the athlete and emits a unique code that is detected by radio receivers located at the strategic points in an event.

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